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Searched refs:control_offset (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/mfd/
H A Dtwl4030-irq.c59 u8 control_offset; /* for SIH_CTRL */ member
83 .control_offset = TWL4030_ ## modname ## _SIH_CTRL, \
113 .control_offset = REG_GPIO_SIH_CTRL,
137 .control_offset = TWL4030_INTERRUPTS_BCISIHCTRL,
173 .control_offset = REG_GPIO_SIH_CTRL,
197 .control_offset = TWL5031_INTERRUPTS_BCISIHCTRL,
246 .control_offset = TWL5031_ACCSIHCTRL,
357 sih->control_offset); in twl4030_init_sih_modules()
/linux/drivers/input/rmi4/
H A Drmi_f12.c295 u16 control_offset; in rmi_f12_update_dribble() local
304 control_offset = rmi_register_desc_calc_reg_offset(&f12->control_reg_desc, 20); in rmi_f12_update_dribble()
314 error = rmi_read_block(rmi_dev, fn->fd.control_base_addr + control_offset, in rmi_f12_update_dribble()
334 error = rmi_write_block(rmi_dev, fn->fd.control_base_addr + control_offset, in rmi_f12_update_dribble()
/linux/drivers/staging/greybus/
H A Daudio_codec.h154 unsigned long control_offset; member
/linux/drivers/platform/x86/intel/speed_select_if/
H A Disst_tpmi_core.c260 struct pp_control_offset control_offset; member