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Searched refs:clock_cfg (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/net/ethernet/cavium/common/
H A Dcavium_ptp.c226 u64 clock_cfg; in cavium_ptp_probe() local
274 clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_probe()
275 clock_cfg |= PTP_CLOCK_CFG_PTP_EN; in cavium_ptp_probe()
276 writeq(clock_cfg, clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_probe()
291 clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_probe()
292 clock_cfg &= ~PTP_CLOCK_CFG_PTP_EN; in cavium_ptp_probe()
293 writeq(clock_cfg, clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_probe()
313 u64 clock_cfg; in cavium_ptp_remove() local
320 clock_cfg = readq(clock->reg_base + PTP_CLOCK_CFG); in cavium_ptp_remove()
321 clock_cfg &= ~PTP_CLOCK_CFG_PTP_EN; in cavium_ptp_remove()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c452 struct dc_clock_config *clock_cfg) in dcn2_get_clock() argument
456 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz; in dcn2_get_clock()
457 clock_cfg->min_clock_khz = DCN_MINIMUM_DISPCLK_Khz; in dcn2_get_clock()
458 clock_cfg->current_clock_khz = clk_mgr->clks.dispclk_khz; in dcn2_get_clock()
459 clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dispclk_khz; in dcn2_get_clock()
462 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz; in dcn2_get_clock()
463 clock_cfg->min_clock_khz = DCN_MINIMUM_DPPCLK_Khz; in dcn2_get_clock()
464 clock_cfg->current_clock_khz = clk_mgr->clks.dppclk_khz; in dcn2_get_clock()
465 clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dppclk_khz; in dcn2_get_clock()
H A Ddcn20_clk_mgr.h51 struct dc_clock_config *clock_cfg);
/linux/drivers/clk/stm32/
H A Dclk-stm32-core.h50 void *clock_cfg; member
167 .clock_cfg = (_struct) {_clk},\
H A Dclk-stm32-core.c640 struct clk_stm32_mux *mux = cfg->clock_cfg; in clk_stm32_mux_register()
661 struct clk_stm32_gate *gate = cfg->clock_cfg; in clk_stm32_gate_register()
682 struct clk_stm32_div *div = cfg->clock_cfg; in clk_stm32_div_register()
703 struct clk_stm32_composite *composite = cfg->clock_cfg; in clk_stm32_composite_register()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h305 struct dc_clock_config *clock_cfg);
/linux/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer.h1141 struct dc_clock_config *clock_cfg);
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h2669 void dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg);
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc.c5549 void dc_get_clock(struct dc *dc, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg) in dc_get_clock() argument
5552 dc->hwss.get_clock(dc, clock_type, clock_cfg); in dc_get_clock()