| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/bounding_boxes/ |
| H A D | dcn4_soc_bb.h | 87 .clk_values_khz = {97000},
91 .clk_values_khz = {300000, 2500000},
95 .clk_values_khz = {200000, 1564000},
99 .clk_values_khz = {100000, 2000000},
103 .clk_values_khz = {100000, 2000000},
107 .clk_values_khz = {100000, 1564000},
111 .clk_values_khz = {810000, 810000},
115 .clk_values_khz = {300000, 1200000},
119 .clk_values_khz = {666667, 666667},
123 .clk_values_khz = {625000, 625000},
[all …]
|
| H A D | dcn3_soc_bb.h | 137 .clk_values_khz = {97000, 435000, 731000, 1187000},
141 .clk_values_khz = {300000, 2500000},
145 .clk_values_khz = {200000, 1800000},
149 .clk_values_khz = {100000, 2000000},
153 .clk_values_khz = {100000, 2000000},
157 .clk_values_khz = {100000, 2000000},
161 .clk_values_khz = {810000, 810000},
165 .clk_values_khz = {300000, 1600000},
169 .clk_values_khz = {666667, 666667},
173 .clk_values_khz = {625000, 625000},
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/ |
| H A D | dml2_mcg_dcn4.c | 58 min_dcfclk_khz = soc_bb->clk_table.dcfclk.clk_values_khz[0]; in build_min_clk_table_fine_grained()
59 min_fclk_khz = soc_bb->clk_table.fclk.clk_values_khz[0]; in build_min_clk_table_fine_grained()
63 …re_derate_dram_bw_kbps = uclk_to_dram_bw_kbps(soc_bb->clk_table.uclk.clk_values_khz[i], &soc_bb->c… in build_min_clk_table_fine_grained()
76 …table->dram_bw_table.entries[i].min_fclk_khz, soc_bb->clk_table.fclk.clk_values_khz, soc_bb->clk_t… in build_min_clk_table_fine_grained()
101 …e->dram_bw_table.entries[i].min_dcfclk_khz, soc_bb->clk_table.dcfclk.clk_values_khz, soc_bb->clk_t… in build_min_clk_table_fine_grained()
138 …re_derate_dram_bw_kbps = uclk_to_dram_bw_kbps(soc_bb->clk_table.uclk.clk_values_khz[i], &soc_bb->c… in build_min_clk_table_coarse_grained()
139 min_table->dram_bw_table.entries[i].min_dcfclk_khz = soc_bb->clk_table.dcfclk.clk_values_khz[i]; in build_min_clk_table_coarse_grained()
140 min_table->dram_bw_table.entries[i].min_fclk_khz = soc_bb->clk_table.fclk.clk_values_khz[i]; in build_min_clk_table_coarse_grained()
179 …min_table->max_clocks_khz.dispclk = soc_bb->clk_table.dispclk.clk_values_khz[soc_bb->clk_table.dis… in build_min_clock_table()
180 …min_table->max_clocks_khz.dppclk = soc_bb->clk_table.dppclk.clk_values_khz[soc_bb->clk_table.dppcl… in build_min_clock_table()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/ |
| H A D | dml21_translation_helper.c | 114 dml_clk_table->dcfclk.clk_values_khz[i] = dc_bw_params->dc_mode_limit.dcfclk_mhz * 1000; in dml21_apply_soc_bb_overrides()
117 dml_clk_table->dcfclk.clk_values_khz[i] = 0; in dml21_apply_soc_bb_overrides()
121 dml_clk_table->dcfclk.clk_values_khz[i] = dc_clk_table->entries[i].dcfclk_mhz * 1000; in dml21_apply_soc_bb_overrides()
124 dml_clk_table->dcfclk.clk_values_khz[i] = 0; in dml21_apply_soc_bb_overrides()
137 dml_clk_table->fclk.clk_values_khz[i] = dc_bw_params->dc_mode_limit.fclk_mhz * 1000; in dml21_apply_soc_bb_overrides()
140 dml_clk_table->fclk.clk_values_khz[i] = 0; in dml21_apply_soc_bb_overrides()
144 dml_clk_table->fclk.clk_values_khz[i] = dc_clk_table->entries[i].fclk_mhz * 1000; in dml21_apply_soc_bb_overrides()
147 dml_clk_table->fclk.clk_values_khz[i] = 0; in dml21_apply_soc_bb_overrides()
160 dml_clk_table->uclk.clk_values_khz[i] = dc_bw_params->dc_mode_limit.memclk_mhz * 1000; in dml21_apply_soc_bb_overrides()
163 dml_clk_table->uclk.clk_values_khz[i] = 0; in dml21_apply_soc_bb_overrides()
[all …]
|
| H A D | dml21_wrapper.c | 173 …in_ctx->v21.dml_init.soc_bb.clk_table.dispclk.clk_values_khz[in_ctx->v21.dml_init.soc_bb.clk_table… in dml21_calculate_rq_and_dlg_params()
175 …max_supported_dispclk_khz = in_ctx->v21.dml_init.soc_bb.clk_table.dispclk.clk_values_khz[0] * 1000; in dml21_calculate_rq_and_dlg_params()
180 …in_ctx->v21.dml_init.soc_bb.clk_table.dppclk.clk_values_khz[in_ctx->v21.dml_init.soc_bb.clk_table.… in dml21_calculate_rq_and_dlg_params()
182 …k.max_supported_dppclk_khz = in_ctx->v21.dml_init.soc_bb.clk_table.dppclk.clk_values_khz[0] * 1000; in dml21_calculate_rq_and_dlg_params()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/ |
| H A D | dml2_dpmm_dcn4.c | 232 while (index < clock_table->num_clk_values && clock_table->clk_values_khz[index] < min_value) in round_up_and_copy_to_next_dpm()
236 *rounded_value = clock_table->clk_values_khz[index]; in round_up_and_copy_to_next_dpm()
239 } else if (clock_table->clk_values_khz[clock_table->num_clk_values - 1] >= min_value) { in round_up_and_copy_to_next_dpm()
285 …if (display_cfg->min_clocks.dcn4x.active.dcfclk_khz <= state_table->dcfclk.clk_values_khz[index] && in map_soc_min_clocks_to_dpm_coarse_grained()
286 display_cfg->min_clocks.dcn4x.active.fclk_khz <= state_table->fclk.clk_values_khz[index] && in map_soc_min_clocks_to_dpm_coarse_grained()
287 display_cfg->min_clocks.dcn4x.active.uclk_khz <= state_table->uclk.clk_values_khz[index]) { in map_soc_min_clocks_to_dpm_coarse_grained()
288 display_cfg->min_clocks.dcn4x.active.dcfclk_khz = state_table->dcfclk.clk_values_khz[index]; in map_soc_min_clocks_to_dpm_coarse_grained()
289 display_cfg->min_clocks.dcn4x.active.fclk_khz = state_table->fclk.clk_values_khz[index]; in map_soc_min_clocks_to_dpm_coarse_grained()
290 display_cfg->min_clocks.dcn4x.active.uclk_khz = state_table->uclk.clk_values_khz[index]; in map_soc_min_clocks_to_dpm_coarse_grained()
299 if (display_cfg->min_clocks.dcn4x.idle.dcfclk_khz <= state_table->dcfclk.clk_values_khz[index] && in map_soc_min_clocks_to_dpm_coarse_grained()
[all …]
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/ |
| H A D | dml_top_soc_parameter_types.h | 105 unsigned long clk_values_khz[DML_MAX_CLK_TABLE_SIZE]; member
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| H A D | dml2_core_utils.c | 386 …ML::%s: clk_table.uclk.clk_values_khz[%d] = %d\n", __func__, i, clk_table->uclk.clk_values_khz[i]); in dml2_core_utils_get_active_min_uclk_dpm_index()
388 if (uclk_freq_khz == clk_table->uclk.clk_values_khz[i]) { in dml2_core_utils_get_active_min_uclk_dpm_index()
|
| H A D | dml2_core_dcn4.c | 526 if (uclk_freq_khz == soc_bb->clk_table.uclk.clk_values_khz[i]) in lookup_uclk_dpm_index_by_freq()
|
| H A D | dml2_core_shared.c | 772 mode_lib->ms.SOCCLK = ((double)mode_lib->soc.clk_table.socclk.clk_values_khz[0] / 1000); in dml2_core_shared_mode_support()
1247 ((double)mode_lib->soc.clk_table.phyclk.clk_values_khz[0] / 1000), in dml2_core_shared_mode_support()
1248 ((double)mode_lib->soc.clk_table.phyclk_d18.clk_values_khz[0] / 1000), in dml2_core_shared_mode_support()
1249 ((double)mode_lib->soc.clk_table.phyclk_d32.clk_values_khz[0] / 1000), in dml2_core_shared_mode_support()
1489 ….output.audio_sample_layout) > ((double)mode_lib->soc.clk_table.dtbclk.clk_values_khz[0] / 1000)) { in dml2_core_shared_mode_support()
9017 …ML::%s: clk_table.uclk.clk_values_khz[%d] = %d\n", __func__, i, clk_table->uclk.clk_values_khz[i]); in get_active_min_uclk_dpm_index()
9019 if (uclk_freq_khz == clk_table->uclk.clk_values_khz[i]) { in get_active_min_uclk_dpm_index()
11388 …double max_uclk_mhz = mode_lib->soc.clk_table.uclk.clk_values_khz[mode_lib->soc.clk_table.uclk.num… in dml2_core_shared_mode_programming()
|
| H A D | dml2_core_dcn4_calcs.c | 6846 …ML::%s: clk_table.uclk.clk_values_khz[%d] = %d\n", __func__, i, clk_table->uclk.clk_values_khz[i]); in get_active_min_uclk_dpm_index()
6848 if (uclk_freq_khz == clk_table->uclk.clk_values_khz[i]) { in get_active_min_uclk_dpm_index()
7046 mode_lib->ms.SOCCLK = ((double)mode_lib->soc.clk_table.socclk.clk_values_khz[0] / 1000); in dml_core_mode_support()
7531 ((double)mode_lib->soc.clk_table.phyclk.clk_values_khz[0] / 1000), in dml_core_mode_support()
7532 ((double)mode_lib->soc.clk_table.phyclk_d18.clk_values_khz[0] / 1000), in dml_core_mode_support()
7533 ((double)mode_lib->soc.clk_table.phyclk_d32.clk_values_khz[0] / 1000), in dml_core_mode_support()
11566 …max_uclk_mhz = mode_lib->soc.clk_table.uclk.clk_values_khz[mode_lib->soc.clk_table.uclk.num_clk_va… in dml_core_mode_programming()
|