Searched refs:clk_div_tx_eth0 (Results 1 – 2 of 2) sorted by relevance
804 static DEFINE_SG2044_DIV_PDATA(CLK_DIV_TX_ETH0, clk_div_tx_eth0,1440 &clk_div_tx_eth0.common.hw,1559 &clk_div_tx_eth0.common,
587 #define clk_div_tx_eth0 (&sg2042_div_clks_level_2[13].hw) macro735 SG2042_GATE_HW(GATE_CLK_TX_ETH0, "clk_gate_tx_eth0", clk_div_tx_eth0,