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Searched refs:ccfg (Results 1 – 11 of 11) sorted by relevance

/linux/arch/mips/pci/
H A Dpci-tx4938.c25 (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ? in tx4938_report_pciclk()
28 u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_report_pciclk() local
29 switch ((unsigned long)ccfg & in tx4938_report_pciclk()
61 __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_report_pci1clk() local
63 txx9_gbus_clock / ((ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2); in tx4938_report_pci1clk()
66 (ccfg & TX4938_CCFG_PCI1_66) ? "PCI66 " : "", in tx4938_report_pci1clk()
80 u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_pciclk66_setup() local
81 pcidivmode = (unsigned long)ccfg & in tx4938_pciclk66_setup()
109 (unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg)); in tx4938_pciclk66_setup()
H A Dpci-tx4927.c25 (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ? in tx4927_report_pciclk()
28 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg); in tx4927_report_pciclk() local
29 switch ((unsigned long)ccfg & in tx4927_report_pciclk()
60 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg); in tx4927_pciclk66_setup() local
61 pcidivmode = (unsigned long)ccfg & in tx4927_pciclk66_setup()
78 (unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg)); in tx4927_pciclk66_setup()
/linux/arch/mips/txx9/generic/
H A Dsetup_tx4927.c31 if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST) in tx4927_wdr_init()
49 (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) ? in tx4927_machine_restart()
54 while (!(____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST)) in tx4927_machine_restart()
57 if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) { in tx4927_machine_restart()
73 (unsigned long long)____raw_readq(&tx4927_ccfgptr->ccfg), in tx4927_be_handler()
93 u64 ccfg; in tx4927_setup() local
110 ccfg = ____raw_readq(&tx4927_ccfgptr->ccfg); in tx4927_setup()
113 divmode = (__u32)ccfg & TX4927_CCFG_DIVMODE_MASK; in tx4927_setup()
143 divmode = (__u32)ccfg & TX4927_CCFG_DIVMODE_MASK; in tx4927_setup()
183 if (!(____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB)) in tx4927_setup()
[all …]
H A Dsetup_tx4938.c33 if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST) in tx4938_wdr_init()
51 (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) ? in tx4938_machine_restart()
56 while (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST)) in tx4938_machine_restart()
59 if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) { in tx4938_machine_restart()
75 (unsigned long long)____raw_readq(&tx4938_ccfgptr->ccfg), in tx4938_be_handler()
98 u64 ccfg; in tx4938_setup() local
115 ccfg = ____raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_setup()
118 divmode = (__u32)ccfg & TX4938_CCFG_DIVMODE_MASK; in tx4938_setup()
152 divmode = (__u32)ccfg & TX4938_CCFG_DIVMODE_MASK; in tx4938_setup()
196 if (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB)) in tx4938_setup()
[all …]
/linux/arch/mips/include/asm/txx9/
H A Dtx4927.h91 u64 ccfg; member
242 ____raw_writeq(____raw_readq(&tx4927_ccfgptr->ccfg) in tx4927_ccfg_clear()
244 &tx4927_ccfgptr->ccfg); in tx4927_ccfg_clear()
248 ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg) in tx4927_ccfg_set()
250 &tx4927_ccfgptr->ccfg); in tx4927_ccfg_set()
254 ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg) in tx4927_ccfg_change()
257 &tx4927_ccfgptr->ccfg); in tx4927_ccfg_change()
H A Dtx4938.h48 u64 ccfg; member
/linux/arch/mips/txx9/rbtx4927/
H A Dsetup.c64 int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB); in tx4927_pci_setup()
69 if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) in tx4927_pci_setup()
111 int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB); in tx4937_pci_setup()
116 if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) in tx4937_pci_setup()
241 switch ((unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg) & in rbtx4927_clock_init()
267 switch ((unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg) & in rbtx4937_clock_init()
/linux/drivers/dma/
H A Dk3dma.c80 u32 ccfg; member
370 c->ccfg = 0; in k3_dma_free_chan_resources()
447 dma_addr_t src, size_t len, u32 num, u32 ccfg) in k3_dma_fill_desc() argument
457 ds->desc_hw[num].config = ccfg; in k3_dma_fill_desc()
510 if (!c->ccfg) { in k3_dma_prep_memcpy()
512 c->ccfg = CX_CFG_SRCINCR | CX_CFG_DSTINCR | CX_CFG_EN; in k3_dma_prep_memcpy()
513 c->ccfg |= (0xf << 20) | (0xf << 24); /* burst = 16 */ in k3_dma_prep_memcpy()
514 c->ccfg |= (0x3 << 12) | (0x3 << 16); /* width = 64 bit */ in k3_dma_prep_memcpy()
519 k3_dma_fill_desc(ds, dst, src, copy, num++, c->ccfg); in k3_dma_prep_memcpy()
569 k3_dma_fill_desc(ds, dst, src, len, num++, c->ccfg); in k3_dma_prep_slave_sg()
[all …]
H A Damba-pl08x.c209 u32 ccfg; member
392 struct pl08x_phy_chan *phychan, const u32 *lli, u32 ccfg) in pl08x_write_lli() argument
400 lli[PL080S_LLI_CCTL2], ccfg); in pl08x_write_lli()
406 lli[PL080_LLI_LLI], lli[PL080_LLI_CCTL], ccfg); in pl08x_write_lli()
518 writel(ccfg, phychan->reg_config); in pl08x_write_lli()
543 pl08x_write_lli(pl08x, phychan, &txd->llis_va[0], txd->ccfg); in pl08x_start_next_txd()
1337 fc = (txd->ccfg & PL080_CONFIG_FLOW_CONTROL_MASK) >> in pl08x_fill_llis_for_desc()
1910 txd->ccfg = 0; in pl08x_prep_dma_memcpy()
1913 txd->ccfg = PL080_CONFIG_ERR_IRQ_MASK | in pl08x_prep_dma_memcpy()
1990 txd->ccfg = PL080_CONFIG_ERR_IRQ_MASK | in pl08x_init_txd()
[all …]
/linux/sound/soc/qcom/qdsp6/
H A Dq6afe.c1221 struct afe_clk_cfg ccfg = {0,}; in q6afe_port_set_sysclk()
1234 ccfg.i2s_cfg_minor_version = AFE_API_VERSION_I2S_CONFIG; in q6afe_port_set_sysclk()
1235 ccfg.clk_val1 = freq; in q6afe_port_set_sysclk()
1236 ccfg.clk_src = clk_src; in q6afe_port_set_sysclk()
1237 ccfg.clk_root = clk_root; in q6afe_port_set_sysclk()
1238 ccfg.clk_set_mode = Q6AFE_LPASS_MODE_CLK1_VALID; in q6afe_port_set_sysclk()
1239 ret = q6afe_port_set_lpass_clock(port, &ccfg); in q6afe_port_set_sysclk()
1243 ccfg.i2s_cfg_minor_version = AFE_API_VERSION_I2S_CONFIG; in q6afe_port_set_sysclk()
1244 ccfg.clk_val2 = freq; in q6afe_port_set_sysclk()
1245 ccfg in q6afe_port_set_sysclk()
1215 struct afe_clk_cfg ccfg = {0,}; q6afe_port_set_sysclk() local
[all...]
/linux/drivers/staging/most/video/
H A Dvideo.c455 struct most_channel_config *ccfg, char *name, in comp_probe_channel() argument
466 if (ccfg->direction != MOST_CH_RX) { in comp_probe_channel()
471 if (ccfg->data_type != MOST_CH_SYNC && in comp_probe_channel()
472 ccfg->data_type != MOST_CH_ISOC) { in comp_probe_channel()