| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1546 pri_pipe->top_pipe->next_odm_pipe->bottom_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm()
1549 if (pri_pipe->bottom_pipe && pri_pipe->bottom_pipe->next_odm_pipe) { in dcn30_split_stream_for_mpc_or_odm()
1550 pri_pipe->bottom_pipe->next_odm_pipe->top_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm()
1551 sec_pipe->bottom_pipe = pri_pipe->bottom_pipe->next_odm_pipe; in dcn30_split_stream_for_mpc_or_odm()
1567 if (pri_pipe->bottom_pipe) { in dcn30_split_stream_for_mpc_or_odm()
1568 ASSERT(pri_pipe->bottom_pipe != sec_pipe); in dcn30_split_stream_for_mpc_or_odm()
1569 sec_pipe->bottom_pipe = pri_pipe->bottom_pipe; in dcn30_split_stream_for_mpc_or_odm()
1570 sec_pipe->bottom_pipe->top_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm()
1572 pri_pipe->bottom_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm()
1701 struct pipe_ctx *mpo_pipe = pipe->bottom_pipe; in dcn30_internal_validate_bw()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 1842 const struct pipe_ctx *cur_sec_dpp = cur_opp_head->bottom_pipe; in resource_find_free_pipe_used_in_cur_mpc_blending_tree()
1856 cur_sec_dpp = cur_sec_dpp->bottom_pipe; in resource_find_free_pipe_used_in_cur_mpc_blending_tree()
2047 pipe = pipe->bottom_pipe; in resource_get_dpp_pipes_for_opp_head()
2077 pipe = pipe->bottom_pipe; in resource_get_dpp_pipes_for_plane()
2132 const struct pipe_ctx *other_pipe = pipe->bottom_pipe; in resource_get_mpc_slice_count()
2136 other_pipe = other_pipe->bottom_pipe; in resource_get_mpc_slice_count()
2281 if (pipe_a->bottom_pipe && pipe_b->bottom_pipe) { in resource_is_pipe_topology_changed()
2282 if (pipe_a->bottom_pipe->pipe_idx != pipe_b->bottom_pipe->pipe_idx) in resource_is_pipe_topology_changed()
2284 if ((pipe_a->bottom_pipe->plane_state == pipe_a->plane_state) && in resource_is_pipe_topology_changed()
2285 (pipe_b->bottom_pipe->plane_state != pipe_b->plane_state)) in resource_is_pipe_topology_changed()
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| H A D | dc_state.c | 157 if (cur_pipe->bottom_pipe) in dc_state_copy_internal()
158 cur_pipe->bottom_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->bottom_pipe->pipe_idx]; in dc_state_copy_internal()
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| H A D | dc_hw_sequencer.c | 888 current_mpc_pipe = current_mpc_pipe->bottom_pipe; in hwss_build_fast_sequence()
921 if (!current_mpc_pipe->bottom_pipe && !current_mpc_pipe->next_odm_pipe && in hwss_build_fast_sequence()
936 current_mpc_pipe = current_mpc_pipe->bottom_pipe; in hwss_build_fast_sequence()
2065 while (bottom_pipe_ctx->bottom_pipe != NULL) in get_surface_tile_visual_confirm_color()
2066 bottom_pipe_ctx = bottom_pipe_ctx->bottom_pipe; in get_surface_tile_visual_confirm_color()
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| H A D | dc.c | 4256 for (mpcc_pipe = top_pipe_to_program; mpcc_pipe; mpcc_pipe = mpcc_pipe->bottom_pipe) in commit_planes_for_stream()
4597 if (pipe_ctx->bottom_pipe || pipe_ctx->next_odm_pipe || in commit_planes_for_stream()
6897 if (pipe_ctx->bottom_pipe) { in dc_capture_register_software_state()
6898 state->mpc.mpcc_bot_sel[i] = pipe_ctx->bottom_pipe->pipe_idx; in dc_capture_register_software_state()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 314 } else if (pipe->bottom_pipe != NULL && pipe->bottom_pipe->plane_state == pipe->plane_state) { in pipe_ctx_to_e2e_pipe_params()
542 if (primary_pipe->bottom_pipe) { in split_stream_across_pipes()
543 ASSERT(primary_pipe->bottom_pipe != secondary_pipe); in split_stream_across_pipes()
544 secondary_pipe->bottom_pipe = primary_pipe->bottom_pipe; in split_stream_across_pipes()
545 secondary_pipe->bottom_pipe->top_pipe = secondary_pipe; in split_stream_across_pipes()
547 primary_pipe->bottom_pipe = secondary_pipe; in split_stream_across_pipes()
946 if (pipe->bottom_pipe && pipe->bottom_pipe->plane_state == pipe->plane_state) { in dcn_validate_bandwidth()
950 int viewport_b_end = pipe->bottom_pipe->plane_res.scl_data.viewport.width in dcn_validate_bandwidth()
951 + pipe->bottom_pipe->plane_res.scl_data.viewport.x; in dcn_validate_bandwidth()
955 - pipe->bottom_pipe->plane_res.scl_data.viewport.x; in dcn_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 1503 prev_odm_pipe->top_pipe->next_odm_pipe->bottom_pipe = next_odm_pipe; in dcn20_split_stream_for_odm()
1506 if (prev_odm_pipe->bottom_pipe && prev_odm_pipe->bottom_pipe->next_odm_pipe) { in dcn20_split_stream_for_odm()
1507 prev_odm_pipe->bottom_pipe->next_odm_pipe->top_pipe = next_odm_pipe; in dcn20_split_stream_for_odm()
1508 next_odm_pipe->bottom_pipe = prev_odm_pipe->bottom_pipe->next_odm_pipe; in dcn20_split_stream_for_odm()
1541 struct pipe_ctx *sec_bot_pipe = secondary_pipe->bottom_pipe; in dcn20_split_stream_for_mpc()
1544 secondary_pipe->bottom_pipe = sec_bot_pipe; in dcn20_split_stream_for_mpc()
1554 if (primary_pipe->bottom_pipe && primary_pipe->bottom_pipe != secondary_pipe) { in dcn20_split_stream_for_mpc()
1555 ASSERT(!secondary_pipe->bottom_pipe); in dcn20_split_stream_for_mpc()
1556 secondary_pipe->bottom_pipe = primary_pipe->bottom_pipe; in dcn20_split_stream_for_mpc()
1557 secondary_pipe->bottom_pipe->top_pipe = secondary_pipe; in dcn20_split_stream_for_mpc()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 125 pipe->bottom_pipe = NULL; in dcn32_merge_pipes_for_subvp()
137 struct pipe_ctx *bottom_pipe = pipe->bottom_pipe; in dcn32_merge_pipes_for_subvp() local
139 top_pipe->bottom_pipe = bottom_pipe; in dcn32_merge_pipes_for_subvp()
140 if (bottom_pipe) in dcn32_merge_pipes_for_subvp()
141 bottom_pipe->top_pipe = top_pipe; in dcn32_merge_pipes_for_subvp()
144 pipe->bottom_pipe = NULL; in dcn32_merge_pipes_for_subvp()
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| H A D | dcn32_resource.c | 1678 curr_pipe = curr_pipe->bottom_pipe; in dcn32_enable_phantom_plane()
2698 if ((old_primary_pipe->next_odm_pipe) && (old_primary_pipe->next_odm_pipe->bottom_pipe) in find_idle_secondary_pipe_check_mpo()
2699 && (!primary_pipe->bottom_pipe)) in find_idle_secondary_pipe_check_mpo()
2700 next_odm_mpo_pipe = old_primary_pipe->next_odm_pipe->bottom_pipe; in find_idle_secondary_pipe_check_mpo()
2751 if (pipe->bottom_pipe && res_ctx->pipe_ctx[pipe->bottom_pipe->pipe_idx].stream == NULL) { in dcn32_acquire_idle_pipe_for_head_pipe_in_layer()
2752 idle_pipe = &res_ctx->pipe_ctx[pipe->bottom_pipe->pipe_idx]; in dcn32_acquire_idle_pipe_for_head_pipe_in_layer()
2753 idle_pipe->pipe_idx = pipe->bottom_pipe->pipe_idx; in dcn32_acquire_idle_pipe_for_head_pipe_in_layer()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 728 pipe_ctx->bottom_pipe = NULL; in dcn20_plane_atomic_disable()
1394 temp_pipe = pipe->bottom_pipe; in dcn20_pipe_control_lock()
1398 temp_pipe = temp_pipe->bottom_pipe; in dcn20_pipe_control_lock()
1419 temp_pipe = temp_pipe->bottom_pipe; in dcn20_pipe_control_lock()
1426 if (lock && (pipe->bottom_pipe != NULL || !flip_immediate)) in dcn20_pipe_control_lock()
1434 temp_pipe = pipe->bottom_pipe; in dcn20_pipe_control_lock()
1438 temp_pipe = temp_pipe->bottom_pipe; in dcn20_pipe_control_lock()
1871 for (other_pipe = pipe->bottom_pipe; other_pipe != NULL; other_pipe = other_pipe->bottom_pipe) { in dcn20_calculate_vready_offset_for_group()
2170 pipe = pipe->bottom_pipe; in dcn20_program_front_end_for_ctx()
2318 pipe = pipe->bottom_pipe; in dcn20_post_unlock_program_front_end()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 1105 if ((pipe_ctx->top_pipe != NULL) || (pipe_ctx->bottom_pipe != NULL)) { in dcn401_set_cursor_position()
1189 (pipe_ctx == pipe_ctx->top_pipe->bottom_pipe)) { in dcn401_set_cursor_position()
1368 pipe_ctx = pipe_ctx->bottom_pipe; in dcn401_wait_for_dcc_meta_propagation()
1913 for (mpc_pipe = odm_pipe; mpc_pipe != NULL; mpc_pipe = mpc_pipe->bottom_pipe) { in dcn401_perform_3dlut_wa_unlock()
2039 pipe_ctx->bottom_pipe = NULL; in dcn401_reset_back_end_for_pipe()
2085 for (other_pipe = pipe->bottom_pipe; other_pipe != NULL; other_pipe = other_pipe->bottom_pipe) { in dcn401_calculate_vready_offset_for_group()
2536 pipe = pipe->bottom_pipe; in dcn401_program_front_end_for_ctx()
2650 pipe = pipe->bottom_pipe; in dcn401_post_unlock_program_front_end()
3464 pipe_ctx->bottom_pipe = NULL; in dcn401_disable_plane_sequence()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 1700 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_apply_single_controller_ctx_to_hw()
2592 if (pipe_ctx->bottom_pipe) { in program_surface_visibility()
2595 ASSERT(pipe_ctx->bottom_pipe->bottom_pipe == NULL); in program_surface_visibility()
2597 if (pipe_ctx->bottom_pipe->plane_state->visible) { in program_surface_visibility()
2951 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_program_front_end_for_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 1159 for (other_pipe = pipe->bottom_pipe; other_pipe != NULL; other_pipe = other_pipe->bottom_pipe) { in calculate_vready_offset_for_group()
1550 pipe_ctx->bottom_pipe = NULL; in dcn10_plane_atomic_disable()
2891 bool per_pixel_alpha = pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe; in dcn10_update_mpcc()
2968 pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe; in update_scaler()
3676 if ((pipe_ctx->top_pipe != NULL) || (pipe_ctx->bottom_pipe != NULL)) { in dcn10_set_cursor_position()
3808 if (pipe_ctx->bottom_pipe) { in dcn10_set_cursor_position()
3810 pipe_ctx->bottom_pipe->plane_res.scl_data.viewport.y; in dcn10_set_cursor_position()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | core_types.h | 478 struct pipe_ctx *bottom_pipe; member
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| /linux/drivers/gpu/drm/amd/display/dc/basics/ |
| H A D | dce_calcs.c | 2803 if (!pipe[i].stream || !pipe[i].bottom_pipe) in populate_initial_data()
2880 …data->src_height[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.v… in populate_initial_data()
2881 …data->src_width[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.vi… in populate_initial_data()
2883 pipe[i].bottom_pipe->plane_state->plane_size.surface_pitch); in populate_initial_data()
2884 …data->h_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.… in populate_initial_data()
2885 …data->v_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.… in populate_initial_data()
2887 pipe[i].bottom_pipe->plane_res.scl_data.ratios.horz.value); in populate_initial_data()
2889 pipe[i].bottom_pipe->plane_res.scl_data.ratios.vert.value); in populate_initial_data()
2890 switch (pipe[i].bottom_pipe->plane_state->rotation) { in populate_initial_data()
2915 if (!pipe[i].stream || pipe[i].bottom_pipe) in populate_initial_data()
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dmub_srv.c | 840 if (subvp_pipe->bottom_pipe) { in populate_subvp_cmd_pipe_info()
841 pipe_data->pipe_config.subvp_data.main_split_pipe_index = subvp_pipe->bottom_pipe->pipe_idx; in populate_subvp_cmd_pipe_info()
855 if (phantom_pipe->bottom_pipe) { in populate_subvp_cmd_pipe_info()
856 …pipe_data->pipe_config.subvp_data.phantom_split_pipe_index = phantom_pipe->bottom_pipe->plane_res.… in populate_subvp_cmd_pipe_info()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| H A D | dcn21_resource.c | 824 struct pipe_ctx *mpo_pipe = pipe->bottom_pipe; in dcn21_fast_validate_bw()
848 struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe; in dcn21_fast_validate_bw()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 429 bool per_pixel_alpha = pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe; in dcn201_update_mpcc()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 888 pipe_ctx->bottom_pipe = NULL; in dcn35_plane_atomic_disable()
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