| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | jpeg_v4_0.c | 99 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in jpeg_v4_0_sw_init() 105 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in jpeg_v4_0_sw_init() 111 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in jpeg_v4_0_sw_init()
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| H A D | jpeg_v4_0_5.c | 129 r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_jpeg[i], in jpeg_v4_0_5_sw_init() 135 r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_jpeg[i], in jpeg_v4_0_5_sw_init() 141 r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_jpeg[i], in jpeg_v4_0_5_sw_init()
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| H A D | gmc_v11_0.c | 798 r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_VMC, in gmc_v11_0_sw_init() 805 r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GFX, in gmc_v11_0_sw_init() 813 r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_DF, 0, in gmc_v11_0_sw_init()
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| H A D | nbio_v7_9.c | 653 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_BIF, in nbio_v7_9_init_ras_controller_interrupt() 671 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_BIF, in nbio_v7_9_init_ras_err_event_athub_interrupt()
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| H A D | sdma_v4_4_2.c | 1425 r = amdgpu_irq_add_id(adev, sdma_v4_4_2_seq_to_irq_id(i), in sdma_v4_4_2_sw_init() 1434 r = amdgpu_irq_add_id(adev, sdma_v4_4_2_seq_to_irq_id(i), in sdma_v4_4_2_sw_init() 1443 r = amdgpu_irq_add_id(adev, sdma_v4_4_2_seq_to_irq_id(i), in sdma_v4_4_2_sw_init() 1449 r = amdgpu_irq_add_id(adev, sdma_v4_4_2_seq_to_irq_id(i), in sdma_v4_4_2_sw_init() 1455 r = amdgpu_irq_add_id(adev, sdma_v4_4_2_seq_to_irq_id(i), in sdma_v4_4_2_sw_init() 1461 r = amdgpu_irq_add_id(adev, sdma_v4_4_2_seq_to_irq_id(i), in sdma_v4_4_2_sw_init() 1467 r = amdgpu_irq_add_id(adev, sdma_v4_4_2_seq_to_irq_id(i), in sdma_v4_4_2_sw_init()
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| H A D | jpeg_v5_0_1.c | 157 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in jpeg_v5_0_1_sw_init() 163 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in jpeg_v5_0_1_sw_init() 169 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in jpeg_v5_0_1_sw_init()
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| H A D | jpeg_v4_0_3.c | 159 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in jpeg_v4_0_3_sw_init() 166 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in jpeg_v4_0_3_sw_init() 172 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in jpeg_v4_0_3_sw_init()
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| H A D | vpe_v6_1.c | 91 ret = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_VPE, in vpe_v6_1_irq_init()
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| H A D | amdgpu_irq.c | 422 int amdgpu_irq_add_id(struct amdgpu_device *adev, in amdgpu_irq_add_id() function
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| H A D | vce_v2_0.c | 436 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 167, &adev->vce.irq); in vce_v2_0_sw_init()
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| H A D | uvd_v3_1.c | 564 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 124, &adev->uvd.inst->irq); in uvd_v3_1_sw_init()
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| H A D | vcn_v5_0_0.c | 150 r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_vcns[i], in vcn_v5_0_0_sw_init() 156 r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_vcns[i], in vcn_v5_0_0_sw_init()
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| H A D | vce_v1_0.c | 588 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 167, &adev->vce.irq); in vce_v1_0_sw_init()
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| H A D | nbif_v6_3_1.c | 724 r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_BIF, in nbif_v6_3_1_init_ras_err_event_athub_interrupt()
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| H A D | ih_v6_1.c | 556 r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_IH, 0, in ih_v6_1_sw_init()
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| H A D | vcn_v5_0_1.c | 180 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in vcn_v5_0_1_sw_init() 186 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in vcn_v5_0_1_sw_init()
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| H A D | sdma_v7_0.c | 1302 r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GFX, in sdma_v7_0_sw_init() 1309 r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GFX, in sdma_v7_0_sw_init()
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| H A D | sdma_v6_0.c | 1318 r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GFX, in sdma_v6_0_sw_init() 1325 r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_GFX, in sdma_v6_0_sw_init()
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| H A D | vce_v3_0.c | 430 …r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_VCE_TRAP, &adev->vce.i… in vce_v3_0_sw_init()
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| H A D | sdma_v5_0.c | 1393 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA0, in sdma_v5_0_sw_init() 1400 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA1, in sdma_v5_0_sw_init()
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| H A D | vcn_v2_0.c | 143 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in vcn_v2_0_sw_init() 151 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in vcn_v2_0_sw_init()
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| H A D | vcn_v4_0_3.c | 208 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in vcn_v4_0_3_sw_init() 214 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN, in vcn_v4_0_3_sw_init()
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| H A D | vcn_v4_0.c | 208 r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_vcns[i], in vcn_v4_0_sw_init() 214 r = amdgpu_irq_add_id(adev, amdgpu_ih_clientid_vcns[i], in vcn_v4_0_sw_init()
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| H A D | gfx_v9_4_3.c | 1002 …r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_9_0__SRCID__CP_EOP_INTERRUPT, &adev->gf… in gfx_v9_4_3_sw_init() 1007 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, in gfx_v9_4_3_sw_init() 1014 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_9_0__SRCID__CP_PRIV_REG_FAULT, in gfx_v9_4_3_sw_init() 1020 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_GRBM_CP, GFX_9_0__SRCID__CP_PRIV_INSTR_FAULT, in gfx_v9_4_3_sw_init()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_irq.c | 2369 r = amdgpu_irq_add_id(adev, client_id, src_id, &adev->crtc_irq); in amdgpu_dm_dce110_register_irq_handlers() 2400 r = amdgpu_irq_add_id(adev, client_id, src_id, &adev->vupdate_irq); in amdgpu_dm_dce110_register_irq_handlers() 2431 r = amdgpu_irq_add_id(adev, client_id, i, &adev->pageflip_irq); in amdgpu_dm_dce110_register_irq_handlers() 2459 r = amdgpu_irq_add_id(adev, client_id, in amdgpu_dm_dce110_register_irq_handlers() 2509 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, in amdgpu_dm_dcn10_register_irq_handlers() 2549 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, i, &adev->vupdate_irq); in amdgpu_dm_dcn10_register_irq_handlers() 2578 r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, DCN_1_0__SRCID__DC_HPD1_INT, in amdgpu_dm_dcn10_register_irq_handlers() 2602 …r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_DCE, DCN_1_0__SRCID__DMCUB_OUTBOX_LOW_PRIORITY_READY… in amdgpu_dm_register_outbox_irq_handlers()
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