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Searched refs:alpha_en (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/
H A Ddcn401_dpp.c65 uint32_t alpha_en = 1; in dpp401_dpp_setup() local
94 alpha_en = 0; in dpp401_dpp_setup()
142 alpha_en = 0; in dpp401_dpp_setup()
146 alpha_en = 0; in dpp401_dpp_setup()
170 alpha_en = 0; in dpp401_dpp_setup()
174 alpha_en = 0; in dpp401_dpp_setup()
193 REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); in dpp401_dpp_setup()
347 if (scl_data->lb_params.alpha_en in dscl401_calc_lb_num_partitions()
359 bool alpha_en, in dscl401_spl_calc_lb_num_partitions() argument
422 if (alpha_en && (num_partitions_a < *num_part_y)) in dscl401_spl_calc_lb_num_partitions()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn201/
H A Ddcn201_dpp.c54 uint32_t alpha_en = 1; in dpp201_cnv_setup() local
82 alpha_en = 0; in dpp201_cnv_setup()
133 alpha_en = 0; in dpp201_cnv_setup()
137 alpha_en = 0; in dpp201_cnv_setup()
153 alpha_en = 0; in dpp201_cnv_setup()
157 alpha_en = 0; in dpp201_cnv_setup()
175 REG_UPDATE(FORMAT_CONTROL, FORMAT_CONTROL__ALPHA_EN, alpha_en); in dpp201_cnv_setup()
/linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop.h207 struct vop_reg alpha_en; member
H A Drockchip_drm_vop.c1062 VOP_WIN_SET(vop, win, alpha_en, 1); in vop_plane_atomic_update()
1065 VOP_WIN_SET(vop, win, alpha_en, 0); in vop_plane_atomic_update()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c1768 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_apply_single_controller_ctx_to_hw()
3062 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != NULL; in dce110_program_front_end_for_pipe()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c1536 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = plane_state->per_pixel_alpha; in resource_build_scaling_params()
1578 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = plane_state->per_pixel_alpha; in resource_build_scaling_params()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c3601 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->plane_state->per_pixel_alpha; in dcn401_update_dchubp_dpp_sequence()