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Searched refs:allow_clock_gating (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn301/
H A Ddcn301_dccg.c53 .allow_clock_gating = dccg2_allow_clock_gating,
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn201/
H A Ddcn201_dccg.c62 .allow_clock_gating = dccg2_allow_clock_gating,
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn30/
H A Ddcn30_dccg.c54 .allow_clock_gating = dccg2_allow_clock_gating,
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn21/
H A Ddcn21_dccg.c127 .allow_clock_gating = dccg2_allow_clock_gating,
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/
H A Ddcn20_dccg.c192 .allow_clock_gating = dccg2_allow_clock_gating,
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c370 … (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating) in dcn201_init_hw()
371 dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true); in dcn201_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Ddccg.h228 void (*allow_clock_gating)(struct dccg *dccg, bool allow); member
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn32/
H A Ddcn32_dccg.c352 .allow_clock_gating = dccg2_allow_clock_gating,
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn314/
H A Ddcn314_dccg.c384 .allow_clock_gating = dccg2_allow_clock_gating,
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c250 … (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating) in dcn31_init_hw()
251 dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true); in dcn31_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c804 … (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating) in dcn30_init_hw()
805 dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true); in dcn30_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn401/
H A Ddcn401_dccg.c865 .allow_clock_gating = dccg2_allow_clock_gating,
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn35/
H A Ddcn35_dccg.c2416 .allow_clock_gating = dccg2_allow_clock_gating,
2451 .allow_clock_gating = dccg2_allow_clock_gating,
/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn31/
H A Ddcn31_dccg.c855 .allow_clock_gating = dccg2_allow_clock_gating,
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c966 … (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating) in dcn32_init_hw()
967 dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true); in dcn32_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c1890 … (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating) in dcn10_init_hw()
1891 dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true); in dcn10_init_hw()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c333 … (dc->res_pool->dccg && dc->res_pool->dccg->funcs && dc->res_pool->dccg->funcs->allow_clock_gating) in dcn401_init_hw()
334 dc->res_pool->dccg->funcs->allow_clock_gating(dc->res_pool->dccg, true); in dcn401_init_hw()