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Searched refs:__base (Results 1 – 11 of 11) sorted by relevance

/linux/arch/x86/include/asm/
H A Ddiv64.h24 unsigned long __upper, __low, __high, __mod, __base; \
25 __base = (base); \
26 if (__builtin_constant_p(__base) && is_power_of_2(__base)) { \
27 __mod = n & (__base - 1); \
28 n >>= ilog2(__base); \
33 __upper = __high % (__base); \
34 __high = __high / (__base); \
37 : "rm" (__base), "0" (__low), "1" (__upper)); \
/linux/drivers/iio/adc/
H A Dnxp-sar-adc.c39 #define NXP_SAR_ADC_CDR(__base, __channel) (((__base) + 0x100) + ((__channel) * 0x4)) argument
45 #define NXP_SAR_ADC_MCR(__base) ((__base) + 0x00) argument
59 #define NXP_SAR_ADC_MSR(__base) ((__base) + 0x04) argument
65 #define NXP_SAR_ADC_ISR(__base) ((__base) + 0x10) argument
70 #define NXP_SAR_ADC_CEOCFR0(__base) ((__base) + 0x14) argument
71 #define NXP_SAR_ADC_CEOCFR1(__base) ((__base) + 0x18) argument
76 #define NXP_SAR_ADC_IMR(__base) ((__base) + 0x20) argument
79 #define NXP_SAR_ADC_CIMR0(__base) ((__base) + 0x24) argument
80 #define NXP_SAR_ADC_CIMR1(__base) ((__base) + 0x28) argument
83 #define NXP_SAR_ADC_DMAE(__base) ((__base) + 0x40) argument
[all …]
/linux/drivers/watchdog/
H A Ds32g_wdt.c20 #define S32G_SWT_CR(__base) ((__base) + 0x00) /* Control Register offset */ argument
26 #define S32G_SWT_TO(__base) ((__base) + 0x08) /* Timeout Register offset */ argument
28 #define S32G_SWT_SR(__base) ((__base) + 0x10) /* Service Register offset */ argument
32 #define S32G_SWT_CO(__base) ((__base) + 0x14) /* Counter output register */ argument
/linux/arch/m68k/include/asm/
H A Ddiv64.h19 unsigned long __base = (base); \
25 : "d" (__base), "0" (__n.n32[0])); \
29 : "d" (__base), "1" (__upper), "0" (__n.n32[1])); \
/linux/drivers/gpu/drm/vmwgfx/
H A Dttm_object.h285 #define ttm_base_object_kfree(__object, __base)\ argument
286 kfree_rcu(__object, __base.rhead)
/linux/arch/alpha/boot/
H A Dstdio.c18 unsigned int __base = (base); \
20 __rem = ((unsigned long long)(n)) % __base; \
21 (n) = ((unsigned long long)(n)) / __base; \
/linux/tools/sched_ext/include/scx/
H A Dcommon.bpf.h282 u64 __base = (u64)&(base); \
283 u64 __addr = (u64)&((base) member) - __base; \
292 : "r"(__base), \
315 u64 __base = (u64)arr; \
316 u64 __addr = (u64)&(arr[i]) - __base; \
323 : "r"(__base), \
/linux/drivers/net/wireless/mediatek/mt76/mt7996/
H A Dregs.h15 struct __base { struct
21 const struct __base *base; argument
H A Dmmio.c22 static const struct __base mt7996_reg_base[] = {
/linux/drivers/net/ethernet/amd/
H A Dsunlance.c277 do { void __iomem *__base = (__lp)->lregs; \
278 sbus_writew(LE_CSR0, __base + RAP); \
279 sbus_writew(LE_C0_STOP, __base + RDP); \
/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2x00queue.c1113 #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \ in rt2x00queue_alloc_entries() argument
1114 (((char *)(__base)) + ((__limit) * (__esize)) + \ in rt2x00queue_alloc_entries()