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Searched refs:XE_ENGINE_CLASS_RENDER (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/xe/
H A Dxe_hw_engine_types.h15 XE_ENGINE_CLASS_RENDER = 0, enumerator
H A Dxe_hw_engine.c59 .class = XE_ENGINE_CLASS_RENDER,
371 hwe->class != XE_ENGINE_CLASS_RENDER) in xe_rtp_cfeg_wmtp_disabled()
1045 case XE_ENGINE_CLASS_RENDER: in xe_hw_engine_class_to_str()
1075 [DRM_XE_ENGINE_CLASS_RENDER] = XE_ENGINE_CLASS_RENDER,
H A Dxe_guc.h73 case XE_ENGINE_CLASS_RENDER: in xe_engine_class_to_guc_class()
H A Dxe_lrc.c90 (class == XE_ENGINE_CLASS_RENDER || in gt_engine_needs_indirect_ctx()
120 case XE_ENGINE_CLASS_RENDER: in xe_gt_lrc_hang_replay_size()
621 if (class == XE_ENGINE_CLASS_RENDER) { in reg_offsets()
1123 !(hwe->class == XE_ENGINE_CLASS_RENDER || in setup_timestamp_wa()
1218 hwe->class != XE_ENGINE_CLASS_RENDER) in setup_invalidate_state_cache_wa()
1399 if (hwe->class == XE_ENGINE_CLASS_RENDER || in setup_indirect_ctx()
2422 if (XE_GT_WA(gt, 14019789679) && q->hwe->class == XE_ENGINE_CLASS_RENDER) { in xe_lrc_emit_hwe_state_instructions()
H A Dxe_reg_whitelist.c26 return hwe->class != XE_ENGINE_CLASS_RENDER; in match_not_render()
H A Dxe_guc_ads.c465 engine_enable_mask(gt, XE_ENGINE_CLASS_RENDER)); in fill_engine_enable_masks()
734 xe_gt_any_hw_engine_by_reset_domain(hwe->gt, XE_ENGINE_CLASS_RENDER); in guc_mmio_regset_write()
763 if (XE_GT_WA(hwe->gt, 1607983814) && hwe->class == XE_ENGINE_CLASS_RENDER) { in guc_mmio_regset_write()
H A Dxe_gt.c263 if (hwe->class == XE_ENGINE_CLASS_RENDER) in emit_wa_job()
1148 case XE_ENGINE_CLASS_RENDER: in xe_gt_any_hw_engine_by_reset_domain()
1150 if (hwe->class == XE_ENGINE_CLASS_RENDER || in xe_gt_any_hw_engine_by_reset_domain()
H A Dxe_exec_queue.c346 (q->class == XE_ENGINE_CLASS_RENDER || q->class == XE_ENGINE_CLASS_COMPUTE)) { in __xe_exec_queue_init()
639 case XE_ENGINE_CLASS_RENDER: in xe_exec_queue_assign_name()
987 if (XE_IOCTL_DBG(xe, q->class != XE_ENGINE_CLASS_RENDER)) in exec_queue_set_state_cache_perf_fix()
H A Dxe_ring_ops.c639 case XE_ENGINE_CLASS_RENDER: in xe_ring_ops_get()
H A Dxe_configfs.c309 { .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, .engine_class = XE_ENGINE_CLASS_RENDER },
H A Dxe_guc.c216 !xe_hw_engine_mask_per_class(gt, XE_ENGINE_CLASS_RENDER)) in guc_ctl_wa_flags()