| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_mode_vba_31.h | 39 long WritebackDestinationWidth,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_mode_vba_314.h | 40 long WritebackDestinationWidth,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_mode_vba_30.h | 39 long WritebackDestinationWidth,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_vba.c | 665 mode_lib->vba.WritebackDestinationWidth[mode_lib->vba.NumberOfActivePlanes] = in fetch_pipe_params()
1126 double WritebackDestinationWidth, in CalculateWriteBackDISPCLK() argument
1132 dml_max((WritebackLumaVTaps * dml_ceil(1.0 / WritebackVRatio, 1) * dml_ceil(WritebackDestinationWidth / 4.0, 1) in CalculateWriteBackDISPCLK()
1133 + dml_ceil(WritebackDestinationWidth / 4.0, 1)) / (double) HTotal + dml_ceil(1.0 / WritebackVRatio, 1) in CalculateWriteBackDISPCLK()
1135 dml_ceil(1.0 / WritebackVRatio, 1) * WritebackDestinationWidth / (double) HTotal)); in CalculateWriteBackDISPCLK()
1139 dml_max((WritebackChromaVTaps * dml_ceil(1 / (2 * WritebackVRatio), 1) * dml_ceil(WritebackDestinationWidth / 2.0 / 2.0, 1) in CalculateWriteBackDISPCLK()
1140 + dml_ceil(WritebackDestinationWidth / 2.0 / WritebackChromaLineBufferWidth, 1)) / HTotal in CalculateWriteBackDISPCLK()
1142 dml_ceil(1.0 / (2 * WritebackVRatio), 1) * WritebackDestinationWidth / 2.0 / HTotal))); in CalculateWriteBackDISPCLK()
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| H A D | display_mode_vba.h | 486 double WritebackDestinationWidth[DC__NUM_DPP__MAX]; member
1257 double WritebackDestinationWidth,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.h | 584 unsigned int WritebackDestinationWidth,
843 unsigned int WritebackDestinationWidth,
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| H A D | display_mode_vba_32.c | 97 (long)mode_lib->vba.WritebackDestinationWidth[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
612 (long)mode_lib->vba.WritebackDestinationWidth[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
629 (int)mode_lib->vba.WritebackDestinationWidth[j], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1488 WRBandwidth = mode_lib->vba.WritebackDestinationWidth[k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1493 WRBandwidth = mode_lib->vba.WritebackDestinationWidth[k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1846 v->WriteBandwidth[k] = mode_lib->vba.WritebackDestinationWidth[k] in dml32_ModeSupportAndSystemConfigurationFull()
1851 v->WriteBandwidth[k] = mode_lib->vba.WritebackDestinationWidth[k] in dml32_ModeSupportAndSystemConfigurationFull()
1899 if (2.0 * mode_lib->vba.WritebackDestinationWidth[k] * (mode_lib->vba.WritebackVTaps[k] - 1) in dml32_ModeSupportAndSystemConfigurationFull()
2245 (long)mode_lib->vba.WritebackDestinationWidth[k], in dml32_ModeSupportAndSystemConfigurationFull()
2939 (long)mode_lib->vba.WritebackDestinationWidth[ in dml32_ModeSupportAndSystemConfigurationFull()
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core.c | 67 dml_uint_t WritebackDestinationWidth,
349 dml_uint_t WritebackDestinationWidth,
1812 dml_uint_t WritebackDestinationWidth, in CalculateWriteBackDISPCLK()
1822 DISPCLK_V = PixelClock * (WritebackVTaps * dml_ceil(WritebackDestinationWidth / 6.0, 1) + 8.0) / (dml_float_t) HTotal; in CalculateWriteBackDISPCLK()
1823 DISPCLK_HB = PixelClock * WritebackVTaps * (WritebackDestinationWidth * WritebackVTaps - WritebackLineBufferSize / 57.0) / 6.0 / (dml_float_t) WritebackSourceWidth; in CalculateWriteBackDISPCLK()
1832 dml_uint_t WritebackDestinationWidth, in CalculateWriteBackDelay()
1845 Line_length = dml_max((dml_float_t) WritebackDestinationWidth, dml_ceil((dml_float_t)WritebackDestinationWidth / 6.0, 1.0) * WritebackVTaps); in CalculateWriteBackDelay()
1850 CalculateWriteBackDelay = Output_lines_last_notclamped * Line_length + (HTotal - WritebackDestinationWidth) + 80; in CalculateWriteBackDelay()
2988 s->WritebackLatencyHiding = (dml_float_t)p->WritebackInterfaceBufferSize * 1024.0 / ((dml_float_t)p->WritebackDestinationWidth[ in CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()
1810 CalculateWriteBackDISPCLK(enum dml_source_format_class WritebackPixelFormat,dml_float_t PixelClock,dml_float_t WritebackHRatio,dml_float_t WritebackVRatio,dml_uint_t WritebackHTaps,dml_uint_t WritebackVTaps,dml_uint_t WritebackSourceWidth,dml_uint_t WritebackDestinationWidth,dml_uint_t HTotal,dml_uint_t WritebackLineBufferSize,dml_float_t DISPCLKDPPCLKVCOSpeed) CalculateWriteBackDISPCLK() argument
1830 CalculateWriteBackDelay(enum dml_source_format_class WritebackPixelFormat,dml_float_t WritebackHRatio,dml_float_t WritebackVRatio,dml_uint_t WritebackVTaps,dml_uint_t WritebackDestinationWidth,dml_uint_t WritebackDestinationHeight,dml_uint_t WritebackSourceHeight,dml_uint_t HTotal) CalculateWriteBackDelay() argument
[all...] |
| H A D | display_mode_core_structs.h | 642 dml_uint_t WritebackDestinationWidth[__DML_NUM_PLANES__]; member
1373 dml_uint_t *WritebackDestinationWidth; member
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| H A D | dml2_translation_helper.c | 1249 out->WritebackDestinationWidth[location] = wb_info->dwb_params.dest_width; in populate_dml_writeback_cfg_from_stream_state()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 3677 unsigned int WritebackDestinationWidth, in CalculateMaxVStartup()
3690 Line_length = math_max2((double)WritebackDestinationWidth, math_ceil2((double)WritebackDestinationWidth / 6.0, 1.0) * WritebackVTaps); in CalculateMaxVStartup()
3695 CalculateWriteBackDelay = Output_lines_last_notclamped * Line_length + (HTotal - WritebackDestinationWidth) + 80; in CalculateMaxVStartup()
4499 unsigned int WritebackDestinationWidth, in RequiredDTBCLK()
4508 DISPCLK_V = PixelClock * (WritebackVTaps * math_ceil2((double)WritebackDestinationWidth / 6.0, 1) + 8.0) / (double)HTotal;
4509 DISPCLK_HB = PixelClock * WritebackVTaps * (WritebackDestinationWidth * WritebackVTaps - WritebackLineBufferSize / 57.0) / 6.0 / (double)WritebackSourceWidth; in DSCDelayRequirement()
3650 CalculateWriteBackDelay(enum dml2_source_format_class WritebackPixelFormat,double WritebackHRatio,double WritebackVRatio,unsigned int WritebackVTaps,unsigned int WritebackDestinationWidth,unsigned int WritebackDestinationHeight,unsigned int WritebackSourceHeight,unsigned int HTotal) CalculateWriteBackDelay() argument
4472 CalculateWriteBackDISPCLK(enum dml2_source_format_class WritebackPixelFormat,double PixelClock,double WritebackHRatio,double WritebackVRatio,unsigned int WritebackHTaps,unsigned int WritebackVTaps,unsigned int WritebackSourceWidth,unsigned int WritebackDestinationWidth,unsigned int HTotal,unsigned int WritebackLineBufferSize) CalculateWriteBackDISPCLK() argument
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