| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 875 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmSetting = bw_params->wm_table.entries[i].wm_inst; in dcn35_build_watermark_ranges()
876 table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType = bw_params->wm_table.entries[i].wm_type; in dcn35_build_watermark_ranges()
878 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn35_build_watermark_ranges()
879 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn35_build_watermark_ranges()
881 if (table->WatermarkRow[WM_DCFCLK][num_valid_sets].WmType == WM_TYPE_PSTATE_CHG) { in dcn35_build_watermark_ranges()
883 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = 0; in dcn35_build_watermark_ranges()
886 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinMclk = in dcn35_build_watermark_ranges()
889 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxMclk = in dcn35_build_watermark_ranges()
894 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MinClock = 0; in dcn35_build_watermark_ranges()
895 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn35_build_watermark_ranges()
[all …]
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| H A D | dcn35_smu.h | 65 WM_DCFCLK, enumerator
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| /linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| H A D | smu10_driver_if.h | 65 WM_DCFCLK, enumerator
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| H A D | smu_v13_0_5_ppt.c | 428 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v13_0_5_set_watermarks_table()
430 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v13_0_5_set_watermarks_table()
432 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v13_0_5_set_watermarks_table()
434 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v13_0_5_set_watermarks_table()
437 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v13_0_5_set_watermarks_table()
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| H A D | smu_v13_0_4_ppt.c | 684 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v13_0_4_set_watermarks_table()
686 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v13_0_4_set_watermarks_table()
688 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v13_0_4_set_watermarks_table()
690 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v13_0_4_set_watermarks_table()
693 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v13_0_4_set_watermarks_table()
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| H A D | yellow_carp_ppt.c | 519 table->WatermarkRow[WM_DCFCLK][i].MinClock = in yellow_carp_set_watermarks_table()
521 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in yellow_carp_set_watermarks_table()
523 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in yellow_carp_set_watermarks_table()
525 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in yellow_carp_set_watermarks_table()
528 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in yellow_carp_set_watermarks_table()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
| H A D | smu13_driver_if_v13_0_5.h | 67 WM_DCFCLK, enumerator
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| H A D | smu13_driver_if_yellow_carp.h | 66 WM_DCFCLK, enumerator
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| H A D | smu12_driver_if.h | 67 WM_DCFCLK, enumerator
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| H A D | smu13_driver_if_v13_0_4.h | 67 WM_DCFCLK, enumerator
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| H A D | smu11_driver_if_vangogh.h | 66 WM_DCFCLK, enumerator
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_smu.h | 57 WM_DCFCLK, enumerator
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| H A D | renoir_ppt.c | 1068 table->WatermarkRow[WM_DCFCLK][i].MinClock = in renoir_set_watermarks_table()
1070 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in renoir_set_watermarks_table()
1072 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in renoir_set_watermarks_table()
1074 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in renoir_set_watermarks_table()
1077 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in renoir_set_watermarks_table()
1079 table->WatermarkRow[WM_DCFCLK][i].WmType = in renoir_set_watermarks_table()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_smu.h | 56 WM_DCFCLK, enumerator
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| H A D | dcn301_smu.h | 71 WM_DCFCLK, enumerator
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu15/ |
| H A D | smu_v15_0_0_ppt.c | 588 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v15_0_0_set_watermarks_table()
590 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v15_0_0_set_watermarks_table()
592 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v15_0_0_set_watermarks_table()
594 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v15_0_0_set_watermarks_table()
597 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v15_0_0_set_watermarks_table()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_smu.h | 68 WM_DCFCLK, enumerator
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| H A D | smu_v14_0_0_ppt.c | 501 table->WatermarkRow[WM_DCFCLK][i].MinClock = in smu_v14_0_0_set_watermarks_table()
503 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v14_0_0_set_watermarks_table()
505 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in smu_v14_0_0_set_watermarks_table()
507 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in smu_v14_0_0_set_watermarks_table()
510 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in smu_v14_0_0_set_watermarks_table()
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| /linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | vangogh_ppt.c | 1613 table->WatermarkRow[WM_DCFCLK][i].MinClock = in vangogh_set_watermarks_table()
1615 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in vangogh_set_watermarks_table()
1617 table->WatermarkRow[WM_DCFCLK][i].MinMclk = in vangogh_set_watermarks_table()
1619 table->WatermarkRow[WM_DCFCLK][i].MaxMclk = in vangogh_set_watermarks_table()
1622 table->WatermarkRow[WM_DCFCLK][i].WmSetting = in vangogh_set_watermarks_table()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu10_hwmgr.c | 1383 table->WatermarkRow[WM_DCFCLK][i].WmType = (uint8_t)0; in smu10_set_watermarks_for_clocks_ranges()
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