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Searched refs:VGA_RENDER_CONTROL (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Davivod.h59 #define VGA_RENDER_CONTROL 0x0300 macro
H A Devergreen.c2670 save->vga_render_control = RREG32(VGA_RENDER_CONTROL); in evergreen_mc_stop()
2674 WREG32(VGA_RENDER_CONTROL, 0); in evergreen_mc_stop()
2845 WREG32(VGA_RENDER_CONTROL, save->vga_render_control); in evergreen_mc_resume()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgmc_v7_0.c289 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in gmc_v7_0_mc_program()
H A Dgmc_v8_0.c464 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in gmc_v8_0_mc_program()
H A Ddce_v8_0.c410 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1); in dce_v8_0_set_vga_render_state()
412 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in dce_v8_0_set_vga_render_state()
H A Dgmc_v9_0.c2200 WREG32_FIELD15(DCE, 0, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in gmc_v9_0_hw_init()
H A Ddce_v10_0.c459 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1); in dce_v10_0_set_vga_render_state()
461 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in dce_v10_0_set_vga_render_state()