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/linux/Documentation/devicetree/bindings/hwmon/
H A Dltc2990.txt13 0: V1, V2, TR2
14 1: V1-V2, TR2
15 2: V1-V2, V3, V4
19 6: V1-V2, V3-V4
20 7: V1, V2, V3, V4
26 1: TR1, V1 or V1-V2 only per mode
35 lltc,meas-mode = <7 3>; /* V1, V2, V3, V4 */
/linux/arch/powerpc/lib/
H A Dxor_vmx.c44 #define XOR(V1, V2) \ argument
46 V1##_0 = vec_xor(V1##_0, V2##_0); \
47 V1##_1 = vec_xor(V1##_1, V2##_1); \
48 V1##_2 = vec_xor(V1##_2, V2##_2); \
49 V1##_3 = vec_xor(V1##_3, V2##_3); \
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-3720-db.dts72 /* Gigabit module on CON19(V2.0)/CON21(V1.4) */
81 /* Gigabit module on CON18(V2.0)/CON20(V1.4) */
129 /* CON15(V2.0)/CON17(V1.4) : PCIe / CON15(V2.0)/CON12(V1.4) :mini-PCIe */
151 /* SD slot module on CON14(V2.0)/CON15(V1.4) */
195 * Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
196 * an FTDI (also on CON24(V2.0)/CON26(V1.4)).
204 /* CON26(V2.0)/CON28(V1.4) */
211 /* CON27(V2.0)/CON29(V1.4) */
216 /* CON29(V2.0)/CON31(V1.4) */
/linux/scripts/
H A DLindent10 V1=`echo $RES | cut -d'.' -f1`
14 if [ $V1 -gt 2 ]; then
16 elif [ $V1 -eq 2 ]; then
/linux/arch/x86/crypto/
H A Daes-xts-avx-x86_64.S329 vpclmulqdq $0x01, GF_POLY, V0, V1
341 vpxor V1, TWEAK1, TWEAK1
352 vpclmulqdq $0x01, GF_POLY, V0, V1
356 vpternlogd $0x96, V0, V1, TWEAK0
366 vpclmulqdq $0x01, GF_POLY, V0, V1
374 vpternlogd $0x96, V0, V1, TWEAK1
569 _vaes \enc, KEY\i, V1
577 _vaes \enc, V4, V1
647 vmovdqu8 1*VL(SRC), V1
651 vpternlogd $0x96, TWEAK1, KEY0, V1
[all …]
/linux/Documentation/arch/arm/
H A Dsunxi.rst65 http://dl.linux-sunxi.org/A23/A23%20Datasheet%20V1.0%2020130830.pdf
69 http://dl.linux-sunxi.org/A23/A23%20User%20Manual%20V1.0%2020130830.pdf
76 … http://dl.linux-sunxi.org/A31/A3x_release_document/A31/IC/A31%20datasheet%20V1.3%2020131106.pdf
80 …http://dl.linux-sunxi.org/A31/A3x_release_document/A31/IC/A31%20user%20manual%20V1.1%2020130630.pdf
86 … http://dl.linux-sunxi.org/A31/A3x_release_document/A31s/IC/A31s%20datasheet%20V1.3%2020131106.pdf
90 …http://dl.linux-sunxi.org/A31/A3x_release_document/A31s/IC/A31s%20User%20Manual%20%20V1.0%20201303…
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-apalis-v1.2-ixora-v1.1.dts10 model = "Toradex Apalis iMX6Q/D Module V1.2+ on Ixora Carrier Board V1.1";
H A Dimx6q-apalis-v1.2-ixora-v1.2.dts10 model = "Toradex Apalis iMX6Q/D Module V1.2+ on Ixora Carrier Board V1.2";
H A Dimx6dl-colibri-v1.2-aster.dts10 model = "Toradex Colibri iMX6DL/S V1.2+ on Colibri Aster Board";
H A Dimx6dl-colibri-v1.2-iris.dts10 model = "Toradex Colibri iMX6DL/S V1.2+ on Colibri Iris Board";
H A Dimx6q-apalis-v1.2-ixora.dts10 model = "Toradex Apalis iMX6Q/D Module V1.2+ on Ixora Carrier Board";
H A Dimx6q-apalis-v1.2-eval.dts10 model = "Toradex Apalis iMX6Q/D Module V1.2+ on Apalis Evaluation Board";
H A Dimx6dl-colibri-v1.2-iris-v2.dts10 model = "Toradex Colibri iMX6DL/S V1.2+ on Colibri Iris V2 Board";
H A Dimx6dl-colibri-v1.2-eval-v3.dts10 model = "Toradex Colibri iMX6DL/S V1.2+ on Colibri Evaluation Board V3";
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8qm-apalis-v1.1-ixora-v1.2.dts12 model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.2 Carrier Board";
H A Dimx8qm-apalis-v1.1-ixora-v1.1.dts12 model = "Toradex Apalis iMX8QM V1.1 on Apalis Ixora V1.1 Carrier Board";
H A Dimx8qm-apalis-v1.1-eval-v1.2.dts12 model = "Toradex Apalis iMX8QM V1.1 on Apalis Evaluation Board V1.2";
H A Dimx8qm-apalis.dtsi17 * Apalis iMX8QM V1.0 has PHY KSZ9031. the Micrel PHY driver
320 * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
329 * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-colibri.dtsi6 * Compatible for Revisions V1.1B, V1.1C, V1.1D, V1.1E, V1.1F; IT: V1.1A, V1.1B
771 regulator-name = "+V1.35_VDDIO_DDR";
780 regulator-name = "+V1.0_VDD_CPU";
792 regulator-name = "+V1.8";
802 * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
815 regulator-name = "+V1.2_VDD_RTC";
833 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
838 regulator-name = "+V1.05_AVDD_PLLE";
844 regulator-name = "+V1.2_AVDD_PLL";
851 regulator-name = "+V1.0_VDD_DDR_HS";
[all …]
H A Dtegra30-apalis-v1.1.dtsi6 * Compatible for Revisions 1GB: V1.1A, V1.1B; 1GB IT: V1.1A, V1.1B;
7 * 2GB: V1.1A, V1.1B
895 regulator-name = "+V1.35_VDDIO_DDR";
902 regulator-name = "+V1.05";
908 regulator-name = "+V1.0_VDD_CPU";
915 regulator-name = "+V1.8";
945 regulator-name = "+V1.2_CSI";
951 regulator-name = "+V1.2_VDD_RTC";
969 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
974 regulator-name = "+V1.05_AVDD_PLLE";
[all …]
H A Dtegra30-apalis.dtsi6 * Compatible for Revisions 1GB: V1.0A; 2GB: V1.0B, V1.0C, V1.0E
887 regulator-name = "+V1.35_VDDIO_DDR";
894 regulator-name = "+V1.05";
900 regulator-name = "+V1.0_VDD_CPU";
907 regulator-name = "+V1.8";
928 regulator-name = "+V1.2_CSI";
934 regulator-name = "+V1.2_VDD_RTC";
952 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
957 regulator-name = "+V1.05_AVDD_PLLE";
963 regulator-name = "+V1.2_AVDD_PLL";
[all …]
/linux/lib/crc/x86/
H A Dcrc-pclmul-template.S316 _prepare_v0 VL, V0, V1, BSWAP_MASK
332 _load_data VL, (BUF), BSWAP_MASK, V1
338 _load_data VL, 1*VL(BUF), BSWAP_MASK, V1
351 _fold_vec_mem VL, V1, 1*VL(BUF), CONSTS, BSWAP_MASK, V4, V5
364 _fold_vec V1, V3, CONSTS, V4
368 _fold_vec_mem VL, V1, 1*VL(BUF), CONSTS, BSWAP_MASK, V4, V5
375 _fold_vec_final VL, V0, V1, CONSTS, BSWAP_MASK, V4, V5
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a774a1-hihope-rzg2m-ex-mipi-2.1.dts19 * On RZ/G2M SoC LSI V1.3 CSI40 supports only 4 lane mode.
20 * HiHope RZ/G2M Rev.4.0 board is based on LSI V1.3 so disable csi40 and
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm4708-netgear-r6250.dts3 * DTS for Netgear R6250 V1
17 model = "Netgear R6250 V1 (BCM4708)";
/linux/lib/
H A Dtest_dynamic_debug.c85 enum cat_level_num { V0 = 14, V1, V2, V3, V4, V5, V6, V7 }; enumerator
125 prdbg(V1); in do_levels()

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