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Searched refs:UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h384 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT 0x3 macro
H A Duvd_4_2_sh_mask.h388 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT 0x3 macro
H A Duvd_4_0_sh_mask.h379 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT 0x00000003 macro
H A Duvd_5_0_sh_mask.h420 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT 0x3 macro
H A Duvd_6_0_sh_mask.h422 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT 0x3 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1059 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT … macro
H A Dvcn_2_5_sh_mask.h3383 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2432 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h978 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h4701 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT … macro
H A Dvcn_5_0_0_sh_mask.h4267 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT … macro
H A Dvcn_4_0_5_sh_mask.h4695 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h4854 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h4897 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN__SHIFT … macro