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Searched refs:UVD_LMI_CTRL2__SPH_DIS_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h476 #define UVD_LMI_CTRL2__SPH_DIS_MASK macro
H A Duvd_3_1_sh_mask.h297 #define UVD_LMI_CTRL2__SPH_DIS_MASK 0x1 macro
H A Duvd_4_2_sh_mask.h297 #define UVD_LMI_CTRL2__SPH_DIS_MASK 0x1 macro
H A Duvd_4_0_sh_mask.h306 #define UVD_LMI_CTRL2__SPH_DIS_MASK 0x00000001L macro
H A Duvd_5_0_sh_mask.h329 #define UVD_LMI_CTRL2__SPH_DIS_MASK 0x1 macro
H A Duvd_6_0_sh_mask.h331 #define UVD_LMI_CTRL2__SPH_DIS_MASK 0x1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h994 #define UVD_LMI_CTRL2__SPH_DIS_MASK macro
H A Dvcn_2_5_sh_mask.h3304 #define UVD_LMI_CTRL2__SPH_DIS_MASK macro
H A Dvcn_2_0_0_sh_mask.h2066 #define UVD_LMI_CTRL2__SPH_DIS_MASK macro
H A Dvcn_2_6_0_sh_mask.h893 #define UVD_LMI_CTRL2__SPH_DIS_MASK macro
H A Dvcn_3_0_0_sh_mask.h4616 #define UVD_LMI_CTRL2__SPH_DIS_MASK macro
H A Dvcn_5_0_0_sh_mask.h4184 #define UVD_LMI_CTRL2__SPH_DIS_MASK macro
H A Dvcn_4_0_5_sh_mask.h4612 #define UVD_LMI_CTRL2__SPH_DIS_MASK macro
H A Dvcn_4_0_0_sh_mask.h4769 #define UVD_LMI_CTRL2__SPH_DIS_MASK macro
H A Dvcn_4_0_3_sh_mask.h4812 #define UVD_LMI_CTRL2__SPH_DIS_MASK macro