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Searched refs:UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h475 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT … macro
H A Duvd_3_1_sh_mask.h314 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT 0xb macro
H A Duvd_4_2_sh_mask.h314 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT 0xb macro
H A Duvd_4_0_sh_mask.h305 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT 0x0000000b macro
H A Duvd_5_0_sh_mask.h346 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT 0xb macro
H A Duvd_6_0_sh_mask.h348 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT 0xb macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h992 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT … macro
H A Dvcn_2_5_sh_mask.h3295 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2057 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h884 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h4607 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT … macro
H A Dvcn_5_0_0_sh_mask.h4175 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT … macro
H A Dvcn_4_0_5_sh_mask.h4603 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h4760 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h4803 #define UVD_LMI_CTRL2__MC_WRITE_ID_SEL__SHIFT … macro