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Searched refs:UVD_CGC_UDEC_STATUS__RE_SCLK_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h267 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK 0x1 macro
H A Duvd_4_2_sh_mask.h267 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK 0x1 macro
H A Duvd_4_0_sh_mask.h234 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK 0x00000001L macro
H A Duvd_5_0_sh_mask.h291 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK 0x1 macro
H A Duvd_6_0_sh_mask.h293 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK 0x1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h2041 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1993 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3712 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2771 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK … macro
H A Dvcn_5_0_0_sh_mask.h3445 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK … macro
H A Dvcn_4_0_5_sh_mask.h3755 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK … macro
H A Dvcn_4_0_0_sh_mask.h3889 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK … macro
H A Dvcn_4_0_3_sh_mask.h3924 #define UVD_CGC_UDEC_STATUS__RE_SCLK_MASK … macro