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Searched refs:UVD_CGC_STATUS__REGS_VCLK_MASK (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_3_1_sh_mask.h183 #define UVD_CGC_STATUS__REGS_VCLK_MASK 0x400 macro
H A Duvd_4_2_sh_mask.h183 #define UVD_CGC_STATUS__REGS_VCLK_MASK 0x400 macro
H A Duvd_4_0_sh_mask.h184 #define UVD_CGC_STATUS__REGS_VCLK_MASK 0x00000400L macro
H A Duvd_5_0_sh_mask.h199 #define UVD_CGC_STATUS__REGS_VCLK_MASK 0x400 macro
H A Duvd_6_0_sh_mask.h201 #define UVD_CGC_STATUS__REGS_VCLK_MASK 0x400 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h888 #define UVD_CGC_STATUS__REGS_VCLK_MASK macro
H A Dvcn_2_5_sh_mask.h1957 #define UVD_CGC_STATUS__REGS_VCLK_MASK macro
H A Dvcn_2_0_0_sh_mask.h1907 #define UVD_CGC_STATUS__REGS_VCLK_MASK macro
H A Dvcn_2_6_0_sh_mask.h3628 #define UVD_CGC_STATUS__REGS_VCLK_MASK macro
H A Dvcn_3_0_0_sh_mask.h2687 #define UVD_CGC_STATUS__REGS_VCLK_MASK macro
H A Dvcn_5_0_0_sh_mask.h3407 #define UVD_CGC_STATUS__REGS_VCLK_MASK macro
H A Dvcn_4_0_5_sh_mask.h3717 #define UVD_CGC_STATUS__REGS_VCLK_MASK macro
H A Dvcn_4_0_0_sh_mask.h3851 #define UVD_CGC_STATUS__REGS_VCLK_MASK macro
H A Dvcn_4_0_3_sh_mask.h3886 #define UVD_CGC_STATUS__REGS_VCLK_MASK macro