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Searched refs:TPC0_QM_GLBL_STS1_CP_RD_ERR_SHIFT (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dtpc0_qm_masks.h141 #define TPC0_QM_GLBL_STS1_CP_RD_ERR_SHIFT 2 macro
/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Dtpc0_qm_masks.h137 #define TPC0_QM_GLBL_STS1_CP_RD_ERR_SHIFT 2 macro