Searched refs:SRST (Results 1 – 8 of 8) sorted by relevance
77 #define SRST 0x00000040 macro
31 #define SRST BIT(6) /* Soft Reset */ macro
687 #define SRST 0x40 /* mod: reset chip */ macro
303 reg_write(dev, SRST[0], 0x3f); in tw686x_probe()305 reg_write(dev, SRST[1], 0x3f); in tw686x_probe()
89 #define SRST VDREG2(0x180) macro
166 #define SRST 0x40 /* mod: reset chip */ macro
122 OUTB(np, nc_istat, SRST); in sym_chip_reset()
905 This is achieved by turning CONTROL SRST bit on for at least 5us.907 controller-specific support as the second Register FIS to clear SRST