Searched refs:SOFT_RST (Results 1 – 5 of 5) sorted by relevance
| /linux/Documentation/devicetree/bindings/power/reset/ |
| H A D | ocelot-reset.txt | 3 The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the
|
| /linux/drivers/i3c/master/mipi-i3c-hci/ |
| H A D | core.c | 71 #define SOFT_RST BIT(0) /* Core Reset */ macro
704 !(regval & SOFT_RST), 1, 10000); in i3c_hci_init()
707 reg_write(RESET_CONTROL, SOFT_RST); in i3c_hci_init()
709 !(regval & SOFT_RST), 1, 10000); in i3c_hci_init()
|
| /linux/drivers/net/ethernet/qualcomm/emac/ |
| H A D | emac.h | 108 #define SOFT_RST 0x1 macro
|
| H A D | emac-mac.c | 474 emac_reg_update32(adpt->base + EMAC_DMA_MAS_CTRL, 0, SOFT_RST); in emac_mac_reset()
|
| /linux/sound/soc/sh/ |
| H A D | fsi.c | 1250 fsi_master_mask_set(master, SOFT_RST, IR, 0); in fsi_interrupt()
1251 fsi_master_mask_set(master, SOFT_RST, IR, IR); in fsi_interrupt()
|