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Searched refs:SOC_ENUM_EXT (Results 1 – 25 of 54) sorted by relevance

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/linux/sound/soc/codecs/
H A Dcs47l92.c443 SOC_ENUM_EXT("DFC1RX Width", madera_dfc_width[0],
445 SOC_ENUM_EXT("DFC1RX Type", madera_dfc_type[0],
447 SOC_ENUM_EXT("DFC1TX Width", madera_dfc_width[1],
449 SOC_ENUM_EXT("DFC1TX Type", madera_dfc_type[1],
451 SOC_ENUM_EXT("DFC2RX Width", madera_dfc_width[2],
453 SOC_ENUM_EXT("DFC2RX Type", madera_dfc_type[2],
455 SOC_ENUM_EXT("DFC2TX Width", madera_dfc_width[3],
457 SOC_ENUM_EXT("DFC2TX Type", madera_dfc_type[3],
459 SOC_ENUM_EXT("DFC3RX Width", madera_dfc_width[4],
461 SOC_ENUM_EXT("DFC3R
[all...]
H A Dcs47l90.c436 SOC_ENUM_EXT("DFC1RX Width", madera_dfc_width[0],
438 SOC_ENUM_EXT("DFC1RX Type", madera_dfc_type[0],
440 SOC_ENUM_EXT("DFC1TX Width", madera_dfc_width[1],
442 SOC_ENUM_EXT("DFC1TX Type", madera_dfc_type[1],
444 SOC_ENUM_EXT("DFC2RX Width", madera_dfc_width[2],
446 SOC_ENUM_EXT("DFC2RX Type", madera_dfc_type[2],
448 SOC_ENUM_EXT("DFC2TX Width", madera_dfc_width[3],
450 SOC_ENUM_EXT("DFC2TX Type", madera_dfc_type[3],
452 SOC_ENUM_EXT("DFC3RX Width", madera_dfc_width[4],
454 SOC_ENUM_EXT("DFC3R
[all...]
H A Dcs42l43.c1308 SOC_ENUM_EXT("Jack Override", cs42l43_jack_enum,
2183 SOC_ENUM_EXT("Decimator 1 Ramp Up", cs42l43_dec1_ramp_up,
2185 SOC_ENUM_EXT("Decimator 1 Ramp Down", cs42l43_dec1_ramp_down,
2187 SOC_ENUM_EXT("Decimator 2 Ramp Up", cs42l43_dec2_ramp_up,
2189 SOC_ENUM_EXT("Decimator 2 Ramp Down", cs42l43_dec2_ramp_down,
2191 SOC_ENUM_EXT("Decimator 3 Ramp Up", cs42l43_dec3_ramp_up,
2193 SOC_ENUM_EXT("Decimator 3 Ramp Down", cs42l43_dec3_ramp_down,
2195 SOC_ENUM_EXT("Decimator 4 Ramp Up", cs42l43_dec4_ramp_up,
2197 SOC_ENUM_EXT("Decimator 4 Ramp Down", cs42l43_dec4_ramp_down,
2254 SOC_ENUM_EXT("Decimator 1 Ramp Up", cs42l43b_dec1_ramp_up,
[all …]
H A Dpeb2466.c538 SOC_ENUM_EXT("DAC0 TG1 Freq", peb2466_tg_freq[0][0],
540 SOC_ENUM_EXT("DAC1 TG1 Freq", peb2466_tg_freq[1][0],
542 SOC_ENUM_EXT("DAC2 TG1 Freq", peb2466_tg_freq[2][0],
544 SOC_ENUM_EXT("DAC3 TG1 Freq", peb2466_tg_freq[3][0],
547 SOC_ENUM_EXT("DAC0 TG2 Freq", peb2466_tg_freq[0][1],
549 SOC_ENUM_EXT("DAC1 TG2 Freq", peb2466_tg_freq[1][1],
551 SOC_ENUM_EXT("DAC2 TG2 Freq", peb2466_tg_freq[2][1],
553 SOC_ENUM_EXT("DAC3 TG2 Freq", peb2466_tg_freq[3][1],
H A Dlpass-tx-macro.c2056 SOC_ENUM_EXT("DEC0 MODE", dec_mode_mux_enum[0],
2059 SOC_ENUM_EXT("DEC1 MODE", dec_mode_mux_enum[1],
2062 SOC_ENUM_EXT("DEC2 MODE", dec_mode_mux_enum[2],
2065 SOC_ENUM_EXT("DEC3 MODE", dec_mode_mux_enum[3],
2068 SOC_ENUM_EXT("DEC4 MODE", dec_mode_mux_enum[4],
2071 SOC_ENUM_EXT("DEC5 MODE", dec_mode_mux_enum[5],
2074 SOC_ENUM_EXT("DEC6 MODE", dec_mode_mux_enum[6],
2077 SOC_ENUM_EXT("DEC7 MODE", dec_mode_mux_enum[7],
H A Dcs48l32.h171 SOC_ENUM_EXT(name, enum, snd_soc_get_enum_double, cs48l32_rate_put)
174 SOC_ENUM_EXT(name " Rate", cs48l32_dsp_rate_enum[num], \
H A Dwm8958-dsp2.c925 SOC_ENUM_EXT("MBC Mode", wm8994->mbc_enum, in wm8958_dsp2_init()
951 SOC_ENUM_EXT("VSS Mode", wm8994->vss_enum, in wm8958_dsp2_init()
977 SOC_ENUM_EXT("VSS HPF Mode", wm8994->vss_hpf_enum, in wm8958_dsp2_init()
1005 SOC_ENUM_EXT("Enhanced EQ Mode", wm8994->enh_eq_enum, in wm8958_dsp2_init()
H A Dsma1307.c1009 SOC_ENUM_EXT("Binary Mode", sma1307_binary_mode_enum,
1016 SOC_ENUM_EXT(SMA1307_TDM_RX0_POS_NAME, sma1307_tdm_slot_enum,
1018 SOC_ENUM_EXT(SMA1307_TDM_RX1_POS_NAME, sma1307_tdm_slot_enum,
1020 SOC_ENUM_EXT(SMA1307_TDM_TX0_POS_NAME, sma1307_tdm_slot_enum,
1022 SOC_ENUM_EXT(SMA1307_TDM_TX1_POS_NAME, sma1307_tdm_slot_enum,
1024 SOC_ENUM_EXT(SMA1307_RESET_CTRL_NAME, sma1307_reset_enum,
H A Dwcd938x.c1819 SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum_wcd9380,
1821 SOC_ENUM_EXT("TX0 MODE", tx0_mode_enum_wcd9380,
1823 SOC_ENUM_EXT("TX1 MODE", tx1_mode_enum_wcd9380,
1825 SOC_ENUM_EXT("TX2 MODE", tx2_mode_enum_wcd9380,
1827 SOC_ENUM_EXT("TX3 MODE", tx3_mode_enum_wcd9380,
1832 SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
1834 SOC_ENUM_EXT("TX0 MODE", tx0_mode_enum_wcd9385,
1836 SOC_ENUM_EXT("TX1 MODE", tx1_mode_enum_wcd9385,
1838 SOC_ENUM_EXT("TX2 MODE", tx2_mode_enum_wcd9385,
1840 SOC_ENUM_EXT("TX
[all...]
H A Dwcd939x.c1647 SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum_wcd9390,
1650 SOC_ENUM_EXT("TX0 MODE", tx0_mode_mux_enum_wcd9390,
1652 SOC_ENUM_EXT("TX1 MODE", tx1_mode_mux_enum_wcd9390,
1654 SOC_ENUM_EXT("TX2 MODE", tx2_mode_mux_enum_wcd9390,
1656 SOC_ENUM_EXT("TX3 MODE", tx3_mode_mux_enum_wcd9390,
1661 SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
1664 SOC_ENUM_EXT("TX0 MODE", tx0_mode_mux_enum,
1666 SOC_ENUM_EXT("TX1 MODE", tx1_mode_mux_enum,
1668 SOC_ENUM_EXT("TX2 MODE", tx2_mode_mux_enum,
1670 SOC_ENUM_EXT("TX
[all...]
H A Dak4458.c242 SOC_ENUM_EXT("AK4458 Digital Filter Setting", ak4458_digfil_enum,
287 SOC_ENUM_EXT("AK4497 Digital Filter Setting", ak4458_digfil_enum,
H A Dlpass-va-macro.c1321 SOC_ENUM_EXT("VA_DEC0 MODE", dec_mode_mux_enum[0],
1323 SOC_ENUM_EXT("VA_DEC1 MODE", dec_mode_mux_enum[1],
1325 SOC_ENUM_EXT("VA_DEC2 MODE", dec_mode_mux_enum[2],
1327 SOC_ENUM_EXT("VA_DEC3 MODE", dec_mode_mux_enum[3],
H A Dmax98095.c1578 SOC_ENUM_EXT("EQ1 Mode", in max98095_handle_eq_pdata()
1582 SOC_ENUM_EXT("EQ2 Mode", in max98095_handle_eq_pdata()
1731 SOC_ENUM_EXT((char *)bq_mode_name[0], in max98095_handle_bq_pdata()
1735 SOC_ENUM_EXT((char *)bq_mode_name[1], in max98095_handle_bq_pdata()
H A Dcs48l32.c2618 SOC_ENUM_EXT("EQ1 Mode", cs48l32_eq_mode[0], cs48l32_eq_mode_get, cs48l32_eq_mode_put),
2628 SOC_ENUM_EXT("EQ2 Mode", cs48l32_eq_mode[1], cs48l32_eq_mode_get, cs48l32_eq_mode_put),
2636 SOC_ENUM_EXT("EQ3 Mode", cs48l32_eq_mode[2], cs48l32_eq_mode_get, cs48l32_eq_mode_put),
2644 SOC_ENUM_EXT("EQ4 Mode", cs48l32_eq_mode[3], cs48l32_eq_mode_get, cs48l32_eq_mode_put),
2694 SOC_ENUM_EXT("IN1L Rate", cs48l32_input_rate[0], snd_soc_get_enum_double, cs48l32_in_rate_put),
2695 SOC_ENUM_EXT("IN1R Rate", cs48l32_input_rate[1], snd_soc_get_enum_double, cs48l32_in_rate_put),
2696 SOC_ENUM_EXT("IN2L Rate", cs48l32_input_rate[2], snd_soc_get_enum_double, cs48l32_in_rate_put),
2697 SOC_ENUM_EXT("IN2R Rate", cs48l32_input_rate[3], snd_soc_get_enum_double, cs48l32_in_rate_put),
H A Dtfa989x.c119 SOC_ENUM_EXT("Mode", mode_enum, snd_soc_get_enum_double, tfa989x_put_mode),
/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-misc-control.c229 SOC_ENUM_EXT("Audio_SineGen_Switch", mt8186_afe_sgen_enum[0],
231 SOC_ENUM_EXT("Audio_SineGen_SampleRate", mt8186_afe_sgen_enum[1],
233 SOC_ENUM_EXT("Audio_SineGen_Amplitude", mt8186_afe_sgen_enum[2],
H A Dmt8186-dai-i2s.c153 SOC_ENUM_EXT(MTK_AFE_I2S0_KCONTROL_NAME, mt8186_i2s_enum[0],
155 SOC_ENUM_EXT(MTK_AFE_I2S1_KCONTROL_NAME, mt8186_i2s_enum[0],
157 SOC_ENUM_EXT(MTK_AFE_I2S2_KCONTROL_NAME, mt8186_i2s_enum[0],
159 SOC_ENUM_EXT(MTK_AFE_I2S3_KCONTROL_NAME, mt8186_i2s_enum[0],
/linux/sound/soc/tegra/
H A Dtegra186_dspk.c395 SOC_ENUM_EXT("OSR Value", tegra186_dspk_osr_enum,
397 SOC_ENUM_EXT("LR Polarity Select", tegra186_dspk_lrsel_enum,
399 SOC_ENUM_EXT("Channel Select", tegra186_dspk_ch_sel_enum,
401 SOC_ENUM_EXT("Mono To Stereo", tegra186_dspk_mono_conv_enum,
404 SOC_ENUM_EXT("Stereo To Mono", tegra186_dspk_stereo_conv_enum,
H A Dtegra210_dmic.c405 SOC_ENUM_EXT("Channel Select", tegra210_dmic_ch_enum,
407 SOC_ENUM_EXT("Mono To Stereo",
411 SOC_ENUM_EXT("Stereo To Mono",
415 SOC_ENUM_EXT("OSR Value", tegra210_dmic_osr_enum,
417 SOC_ENUM_EXT("LR Polarity Select", tegra210_dmic_lrsel_enum,
H A Dtegra186_asrc.c749 SOC_ENUM_EXT("Ratio1 Source", src_select1,
753 SOC_ENUM_EXT("Ratio2 Source", src_select2,
757 SOC_ENUM_EXT("Ratio3 Source", src_select3,
761 SOC_ENUM_EXT("Ratio4 Source", src_select4,
765 SOC_ENUM_EXT("Ratio5 Source", src_select5,
769 SOC_ENUM_EXT("Ratio6 Source", src_select6,
H A Dtegra210_mbdrc.c540 SOC_ENUM_EXT("MBDRC Peak RMS Mode", tegra210_mbdrc_peak_rms_enum,
543 SOC_ENUM_EXT("MBDRC Filter Structure",
547 SOC_ENUM_EXT("MBDRC Frame Size", tegra210_mbdrc_frame_size_enum,
550 SOC_ENUM_EXT("MBDRC Mode", tegra210_mbdrc_mode_enum,
H A Dtegra210_i2s.c822 SOC_ENUM_EXT("Capture Stereo To Mono", tegra210_i2s_stereo_conv_enum,
825 SOC_ENUM_EXT("Capture Mono To Stereo", tegra210_i2s_mono_conv_enum,
828 SOC_ENUM_EXT("Playback Stereo To Mono", tegra210_i2s_stereo_conv_enum,
831 SOC_ENUM_EXT("Playback Mono To Stereo", tegra210_i2s_mono_conv_enum,
H A Dtegra210_ope.c228 SOC_ENUM_EXT("Data Flow Direction", tegra210_ope_data_dir_enum,
/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-dai-i2s.c184 SOC_ENUM_EXT(MTK_AFE_I2S0_KCONTROL_NAME, mt8192_i2s_enum,
186 SOC_ENUM_EXT(MTK_AFE_I2S1_KCONTROL_NAME, mt8192_i2s_enum,
188 SOC_ENUM_EXT(MTK_AFE_I2S2_KCONTROL_NAME, mt8192_i2s_enum,
190 SOC_ENUM_EXT(MTK_AFE_I2S3_KCONTROL_NAME, mt8192_i2s_enum,
192 SOC_ENUM_EXT(MTK_AFE_I2S5_KCONTROL_NAME, mt8192_i2s_enum,
194 SOC_ENUM_EXT(MTK_AFE_I2S6_KCONTROL_NAME, mt8192_i2s_enum,
196 SOC_ENUM_EXT(MTK_AFE_I2S7_KCONTROL_NAME, mt8192_i2s_enum,
198 SOC_ENUM_EXT(MTK_AFE_I2S8_KCONTROL_NAME, mt8192_i2s_enum,
200 SOC_ENUM_EXT(MTK_AFE_I2S9_KCONTROL_NAME, mt8192_i2s_enum,
/linux/sound/soc/fsl/
H A Dfsl_micfil.c582 SOC_ENUM_EXT("MICFIL DC Out Remover Control", fsl_micfil_dc_out_remover_enum,
587 SOC_ENUM_EXT("MICFIL Quality Select",
590 SOC_ENUM_EXT("HWVAD Enablement Switch", hwvad_enable_enum,
592 SOC_ENUM_EXT("HWVAD Initialization Mode", hwvad_init_mode_enum,
598 SOC_ENUM_EXT("MICFIL DC Remover Control", fsl_micfil_dc_remover_enum,

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