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Searched refs:SDMA0_BASE__INST4_SEG1 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h699 #define SDMA0_BASE__INST4_SEG1 0 macro
H A Dsienna_cichlid_ip_offset.h897 #define SDMA0_BASE__INST4_SEG1 0 macro
H A Dbeige_goby_ip_offset.h1056 #define SDMA0_BASE__INST4_SEG1 0 macro
H A Dvega10_ip_offset.h1018 #define SDMA0_BASE__INST4_SEG1 0 macro
H A Drenoir_ip_offset.h1140 #define SDMA0_BASE__INST4_SEG1 0 macro
H A Dyellow_carp_offset.h1149 #define SDMA0_BASE__INST4_SEG1 0 macro
H A Darct_ip_offset.h945 #define SDMA0_BASE__INST4_SEG1 0 macro
H A Daldebaran_ip_offset.h1228 #define SDMA0_BASE__INST4_SEG1 0 macro