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Searched refs:SCR (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/arch/s390/
H A Dconfig3270.sh22 SCR=$ROOT/tmp/mkdev3270
23 SCRTMP=$SCR.a
37 echo "#!/bin/sh" > $SCR || exit 1
38 echo " " >> $SCR
39 echo "# Script built by /sbin/config3270" >> $SCR
41 echo rm -rf "$D/$SUBD/*" >> $SCR
46 echo mkdir -p $D/$SUBD >> $SCR
56 echo mknod $D/$TUB c $fsmaj 0 >> $SCR
57 echo chmod 666 $D/$TUB >> $SCR
61 echo mknod $D/$TUB$devno c $fsmaj $min >> $SCR
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-uvc.rst27 SCR field or with that field identical to the previous header), or generally to
54 - The rest of the header, possibly including UVC PTS and SCR fields
/linux/arch/m68k/68000/
H A Ddragen2.c45 SCR = 0x10; /* allow user access to internal registers */ in init_dragen2()
/linux/Documentation/driver-api/mmc/
H A Dmmc-tools.rst37 - Print and parse SCR data.
/linux/drivers/tty/
H A Dsynclink_gt.c371 #define SCR 0x8c /* serial control */ macro
397 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
399 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
2685 unsigned short val = rd_reg16(info, SCR); in wait_mgsl_event()
2687 wr_reg16(info, SCR, (unsigned short)(val | IRQ_RXIDLE)); in wait_mgsl_event()
2750 wr_reg16(info, SCR, in wait_mgsl_event()
2751 (unsigned short)(rd_reg16(info, SCR) & ~IRQ_RXIDLE)); in wait_mgsl_event()
3804 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT2)); in enable_loopback()
3886 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14)); in rx_start()
3894 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14)); in rx_start()
[all …]
/linux/drivers/gpu/drm/stm/
H A Dlvds.c179 u32 SCR; /* Serial Control Register */ member
209 .SCR = 0x20,
235 .SCR = 0x20,
370 lvds_set(lvds, phy->base + phy->ofs.SCR, PHY_SCR_TX_EN); in lvds_pll_enable()
/linux/arch/m68k/include/asm/
H A DMC68EZ328.h35 #define SCR BYTE_REF(SCR_ADDR) macro
H A DMC68VZ328.h37 #define SCR BYTE_REF(SCR_ADDR) macro
H A DMC68328.h34 #define SCR BYTE_REF(SCR_ADDR) macro
/linux/drivers/video/fbdev/
H A Dimsttfb.c86 SCR = 35, /* 0x8C */ enumerator
740 write_reg_le32(par->dc_regs, SCR, scr); in set_imstt_regvals()
/linux/Documentation/driver-api/media/drivers/
H A Dcx2341x-devel.rst2173 1=set initial SCR value when starting encoding (works).
2599 SCR bits 0:31 by display order
2604 SCR bit 32 by display order
/linux/Documentation/admin-guide/media/
H A Dvivid.rst591 The Metadata capture generates UVC format metadata. The PTS and SCR are
1133 - Generate SCR