| /linux/include/dt-bindings/clock/ |
| H A D | samsung,s3c64xx-clock.h | 101 #define SCLK_SPI1 89 macro
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| H A D | exynos7-clk.h | 110 #define SCLK_SPI1 18 macro
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| H A D | s5pv210.h | 192 #define SCLK_SPI1 170 macro
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| H A D | rk3188-cru-common.h | 26 #define SCLK_SPI1 70 macro
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| H A D | rk3308-cru.h | 32 #define SCLK_SPI1 28 macro
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| H A D | rk3368-cru.h | 22 #define SCLK_SPI1 66 macro
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| H A D | px30-cru.h | 39 #define SCLK_SPI1 37 macro
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| H A D | rk3288-cru.h | 21 #define SCLK_SPI1 66 macro
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| H A D | rk3399-cru.h | 29 #define SCLK_SPI1 72 macro
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| /linux/drivers/clk/samsung/ |
| H A D | clk-s3c64xx.c | 255 GATE_SCLK(SCLK_SPI1, "sclk_spi1", "dout_spi1", SCLK_GATE, 21),
355 ALIAS(SCLK_SPI1, "s3c6410-spi.1", "spi_busclk2"),
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| H A D | clk-s5pv210.c | 673 GATE(SCLK_SPI1, "sclk_spi1", "dout_spi1", CLK_SRC_MASK0, 17,
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| H A D | clk-exynos7.c | 786 GATE(SCLK_SPI1, "sclk_spi1_user", "mout_sclk_spi1_user",
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| /linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3xxx.dtsi | 467 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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| H A D | rk3288.dtsi | 302 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | s5pv210.dtsi | 175 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
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| /linux/drivers/clk/rockchip/ |
| H A D | clk-rk3188.c | 394 COMPOSITE_NOMUX(SCLK_SPI1, "sclk_spi1", "pclk_peri", 0,
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| H A D | clk-rk3368.c | 538 COMPOSITE(SCLK_SPI1, "sclk_spi1", mux_pll_src_cpll_gpll_p, 0,
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| H A D | clk-rk3288.c | 519 COMPOSITE(SCLK_SPI1, "sclk_spi1", mux_pll_src_cpll_gpll_p, 0,
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| H A D | clk-rk3308.c | 406 COMPOSITE(SCLK_SPI1, "clk_spi1", mux_dpll_vpll0_xin24m_p, 0,
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| H A D | clk-px30.c | 747 COMPOSITE(SCLK_SPI1, "clk_spi1", mux_gpll_xin24m_p, 0,
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| H A D | clk-rk3399.c | 1328 COMPOSITE(SCLK_SPI1, "clk_spi1", mux_pll_src_cpll_gpll_p, 0,
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3368.dtsi | 252 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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| H A D | rk3308.dtsi | 388 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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| H A D | px30.dtsi | 646 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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| H A D | rk3399-base.dtsi | 862 clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
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