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Searched refs:RTAVFS_REG120__RTAVFSCPOAVGDIV5__SHIFT (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_sh_mask.h35874 #define RTAVFS_REG120__RTAVFSCPOAVGDIV5__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h40945 #define RTAVFS_REG120__RTAVFSCPOAVGDIV5__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h39674 #define RTAVFS_REG120__RTAVFSCPOAVGDIV5__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h43983 #define RTAVFS_REG120__RTAVFSCPOAVGDIV5__SHIFT … macro