Searched refs:RREG8 (Results 1 – 8 of 8) sorted by relevance
24 tmp = RREG8(DAC_DATA); in mgag200_bmc_stop_scanout()30 tmp = RREG8(DAC_DATA); in mgag200_bmc_stop_scanout()40 tmp = RREG8(DAC_DATA); in mgag200_bmc_stop_scanout()70 tmp = RREG8(DAC_DATA); in mgag200_bmc_start_scanout()83 tmp = RREG8(DAC_DATA); in mgag200_bmc_start_scanout()89 tmp = RREG8(DAC_DATA); in mgag200_bmc_start_scanout()
33 #define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg)) macro47 ((v) = RREG8(MGA_MISC_IN))61 RREG8(0x1fda); \69 v = RREG8(MGAREG_SEQ_DATA); \81 v = RREG8(MGAREG_CRTC_DATA); \93 v = RREG8(MGAREG_CRTCEXT_DATA); \117 RREG8(DAC_DATA); \
51 return RREG8(DAC_DATA); in mga_i2c_read_gpio()59 tmp = (RREG8(DAC_DATA) & mask) | val; in mga_i2c_set_gpio()
114 status = RREG8(MGAREG_STATUS + 2); in mga_wait_busy()209 misc = RREG8(MGA_MISC_IN); in mgag200_init_registers()241 misc = RREG8(MGA_MISC_IN); in mgag200_set_mode_regs()
292 if (RREG8(RADEON_CLOCK_CNTL_DATA + 3) >= cnt_threshold) in radeon_wait_pll_lock()
3799 save->GENMO_WT = RREG8(R_0003C2_GENMO_WT); in r100_mc_stop()3852 tmp = RREG8(R_0003C2_GENMO_WT); in r100_vga_render_disable()
1130 ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3; in radeon_legacy_get_lvds_info_from_regs()
1365 #define RREG8(reg) amdgpu_mm_rreg8(adev, (reg)) macro