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Searched refs:RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h9257 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK 0x20 macro
H A Dgfx_8_0_sh_mask.h8707 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK 0x20 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23024 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK … macro
H A Dgc_9_1_sh_mask.h24311 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK … macro
H A Dgc_9_2_1_sh_mask.h24362 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK … macro
H A Dgc_9_4_2_sh_mask.h21816 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK … macro
H A Dgc_11_5_0_sh_mask.h31554 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK … macro
H A Dgc_11_0_0_sh_mask.h36087 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK … macro
H A Dgc_12_0_0_sh_mask.h21693 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK … macro
H A Dgc_10_1_0_sh_mask.h34764 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK … macro
H A Dgc_11_0_3_sh_mask.h39425 #define RLC_GPM_STAT__CNTX_IDLE_BEING_PROCESSED_MASK … macro