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Searched refs:RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_1.c3099 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v12_1_xcc_update_coarse_grain_clock_gating()
3134 data &= ~RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v12_1_xcc_update_coarse_grain_clock_gating()
3312 if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) in gfx_v12_1_get_clockgating_state()
H A Dgfx_v6_0.c2635 data |= RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK; in gfx_v6_0_enable_cgcg()
2644 data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); in gfx_v6_0_enable_cgcg()
H A Dgfx_v9_0.c5105 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v9_0_update_coarse_grain_clock_gating()
5108 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v9_0_update_coarse_grain_clock_gating()
5124 data &= ~(RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK | RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK); in gfx_v9_0_update_coarse_grain_clock_gating()
5319 if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) in gfx_v9_0_get_clockgating_state()
H A Dgfx_v12_0.c4114 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v12_0_update_coarse_grain_clock_gating()
4176 data &= ~RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v12_0_update_coarse_grain_clock_gating()
4344 if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) in gfx_v12_0_get_clockgating_state()
H A Dgfx_v11_0.c5530 RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v11_0_update_coarse_grain_clock_gating()
5592 data &= ~RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK; in gfx_v11_0_update_coarse_grain_clock_gating()
5827 if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) in gfx_v11_0_get_clockgating_state()
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7060 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK 0x00000001L macro
H A Dgfx_7_2_sh_mask.h7887 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK 0x1 macro
H A Dgfx_8_1_sh_mask.h9355 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK 0x1 macro
H A Dgfx_8_0_sh_mask.h8805 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK 0x1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23127 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_9_1_sh_mask.h24414 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_9_2_1_sh_mask.h24475 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_9_4_2_sh_mask.h21924 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_11_5_0_sh_mask.h30070 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_11_0_0_sh_mask.h34442 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_12_0_0_sh_mask.h20174 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_10_1_0_sh_mask.h33584 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro
H A Dgc_11_0_3_sh_mask.h37735 #define RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK … macro