Searched refs:RISCV_VENDOR_EXT_ALTERNATIVES_BASE (Results 1 – 6 of 6) sorted by relevance
40 #define RISCV_VENDOR_EXT_ALTERNATIVES_BASE 0x8000 macro59 ext + RISCV_VENDOR_EXT_ALTERNATIVES_BASE); in riscv_has_vendor_extension_likely()72 ext + RISCV_VENDOR_EXT_ALTERNATIVES_BASE); in riscv_has_vendor_extension_unlikely()84 __riscv_has_extension_likely(vendor, ext + RISCV_VENDOR_EXT_ALTERNATIVES_BASE)) in riscv_cpu_has_vendor_extension_likely()98 __riscv_has_extension_unlikely(vendor, ext + RISCV_VENDOR_EXT_ALTERNATIVES_BASE)) in riscv_cpu_has_vendor_extension_unlikely()
44 BUILD_BUG_ON(ERRATA_MIPS_NUMBER >= RISCV_VENDOR_EXT_ALTERNATIVES_BASE); in mips_errata_patch_func()
86 BUILD_BUG_ON(ERRATA_SIFIVE_NUMBER >= RISCV_VENDOR_EXT_ALTERNATIVES_BASE); in sifive_errata_patch_func()
198 BUILD_BUG_ON(ERRATA_THEAD_NUMBER >= RISCV_VENDOR_EXT_ALTERNATIVES_BASE); in thead_errata_patch_func()
1257 } else if (id >= RISCV_VENDOR_EXT_ALTERNATIVES_BASE) { in riscv_cpufeature_patch_func()1259 id - RISCV_VENDOR_EXT_ALTERNATIVES_BASE)) in riscv_cpufeature_patch_func()
39 RISCV_ISA_VENDOR_EXT_XANDESPMU + RISCV_VENDOR_EXT_ALTERNATIVES_BASE, \49 RISCV_ISA_VENDOR_EXT_XANDESPMU + RISCV_VENDOR_EXT_ALTERNATIVES_BASE, \