Searched refs:RG_HDMITXPLL_RESERVE_BIT3_2 (Results 1 – 2 of 2) sorted by relevance
77 #define RG_HDMITXPLL_RESERVE_BIT3_2 GENMASK(3, 2) macro
177 mtk_phy_update_field(regs + HDMI_1_PLL_CFG_1, RG_HDMITXPLL_RESERVE_BIT3_2, reserve_3_2_value); in mtk_hdmi_pll_set_hw()