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Searched refs:QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK (Results 1 – 2 of 2) sorted by relevance

/linux/arch/mips/ath79/
H A Dclock.c594 QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; in qca956x_clocks_init()
/linux/arch/mips/include/asm/mach-ath79/
H A Dar71xx_regs.h471 #define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f macro