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Searched refs:ProgressiveToInterlaceUnitInOPP (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h483 bool ProgressiveToInterlaceUnitInOPP,
611 bool ProgressiveToInterlaceUnitInOPP,
671 bool ProgressiveToInterlaceUnitInOPP,
1013 bool ProgressiveToInterlaceUnitInOPP,
H A Ddisplay_mode_vba_32.c444 …anceCalculation.SurfaceParameters[k].ProgressiveToInterlaceUnitInOPP = mode_lib->vba.ProgressiveTo… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
697 !mode_lib->vba.ProgressiveToInterlaceUnitInOPP) ? in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
784 …arksAndPerformanceCalculation.myPipe.ProgressiveToInterlaceUnitInOPP = mode_lib->vba.ProgressiveTo… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1440 !mode_lib->vba.ProgressiveToInterlaceUnitInOPP); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1532 mode_lib->vba.ProgressiveToInterlaceUnitInOPP, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1596 mode_lib->vba.ProgressiveToInterlaceUnitInOPP, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2358 mode_lib->vba.ProgressiveToInterlaceUnitInOPP == true) in dml32_ModeSupportAndSystemConfigurationFull()
2737 …ars.dml32_ModeSupportAndSystemConfigurationFull.SurfParameters[k].ProgressiveToInterlaceUnitInOPP = in dml32_ModeSupportAndSystemConfigurationFull()
2738 mode_lib->vba.ProgressiveToInterlaceUnitInOPP; in dml32_ModeSupportAndSystemConfigurationFull()
2963 !mode_lib->vba.ProgressiveToInterlaceUnitInOPP) ? in dml32_ModeSupportAndSystemConfigurationFull()
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H A Ddisplay_mode_vba_util_32.c2069 myPipe[k].ProgressiveToInterlaceUnitInOPP, in dml32_CalculateVMRowAndSwath()
2143 myPipe[k].ProgressiveToInterlaceUnitInOPP, in dml32_CalculateVMRowAndSwath()
2538 bool ProgressiveToInterlaceUnitInOPP, in dml32_CalculatePrefetchSourceLines() argument
2565 if (ProgressiveToInterlaceUnitInOPP) in dml32_CalculatePrefetchSourceLines()
2945 bool ProgressiveToInterlaceUnitInOPP, in dml32_UseMinimumDCFCLK() argument
3100 ProgressiveToInterlaceUnitInOPP, in dml32_UseMinimumDCFCLK()
3204 bool ProgressiveToInterlaceUnitInOPP, in dml32_CalculateVUpdateAndDynamicMetadataParameters() argument
3232 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) in dml32_CalculateVUpdateAndDynamicMetadataParameters()
3510 myPipe->ProgressiveToInterlaceUnitInOPP, in dml32_CalculatePrefetchSchedule()
3591 …>OutputFormat[k] == dm_420 || (myPipe->InterlaceEnable && myPipe->ProgressiveToInterlaceUnitInOPP)) in dml32_CalculatePrefetchSchedule()
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/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h123 bool ProgressiveToInterlaceUnitInOPP; member
H A Ddisplay_mode_vba.c509 mode_lib->vba.ProgressiveToInterlaceUnitInOPP = ip->ptoi_supported; in fetch_ip_params()
1056 && mode_lib->vba.ProgressiveToInterlaceUnitInOPP == true) { in PixelClockAdjustmentForProgressiveToInterlaceUnit()
H A Ddisplay_mode_vba.h414 bool ProgressiveToInterlaceUnitInOPP; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c147 bool ProgressiveToInterlaceUnitInOPP,
260 bool ProgressiveToInterlaceUnitInOPP,
833 v->ProgressiveToInterlaceUnitInOPP, in CalculatePrefetchSchedule()
883 …if (v->OutputFormat[k] == dm_420 || (myPipe->InterlaceEnable && v->ProgressiveToInterlaceUnitInOPP in CalculatePrefetchSchedule()
1519 bool ProgressiveToInterlaceUnitInOPP, in CalculatePrefetchSourceLines() argument
1527 if (ProgressiveToInterlaceUnitInOPP) in CalculatePrefetchSourceLines()
2131 v->ProgressiveToInterlaceUnitInOPP, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2188 v->ProgressiveToInterlaceUnitInOPP, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3108 …ynamicMetadataLinesBeforeActiveRequired, int InterlaceEnable, bool ProgressiveToInterlaceUnitInOPP, in CalculateDynamicMetadataParameters() argument
3127 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) { in CalculateDynamicMetadataParameters()
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core_structs.h475 dml_bool_t ProgressiveToInterlaceUnitInOPP; member
1293 dml_bool_t ProgressiveToInterlaceUnitInOPP; member
1542 dml_bool_t ProgressiveToInterlaceUnitInOPP; member
H A Ddisplay_mode_core.c220 dml_bool_t ProgressiveToInterlaceUnitInOPP,
363 dml_bool_t ProgressiveToInterlaceUnitInOPP,
1066 p->myPipe->ProgressiveToInterlaceUnitInOPP, in CalculatePrefetchSchedule()
1139 …putFormat == dml_420 || (p->myPipe->InterlaceEnable && p->myPipe->ProgressiveToInterlaceUnitInOPP)) in CalculatePrefetchSchedule()
1860 dml_bool_t ProgressiveToInterlaceUnitInOPP, in CalculateVUpdateAndDynamicMetadataParameters() argument
1885 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) { in CalculateVUpdateAndDynamicMetadataParameters()
2379 dml_bool_t ProgressiveToInterlaceUnitInOPP, in CalculatePrefetchSourceLines() argument
2406 if (ProgressiveToInterlaceUnitInOPP) in CalculatePrefetchSourceLines()
3924 dml_bool_t isInterlaceTiming = p->Interlace[k] && !p->ProgressiveToInterlaceUnitInOPP; in CalculateStutterEfficiency()
4671 p->ProgressiveToInterlaceUnitInOPP, in UseMinimumDCFCLK()
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn4_calcs.c1831 bool ProgressiveToInterlaceUnitInOPP, in CalculatePrefetchSourceLines() argument
1859 if (ProgressiveToInterlaceUnitInOPP) in CalculatePrefetchSourceLines()
2943 p->myPipe[k].ProgressiveToInterlaceUnitInOPP, in CalculateVMRowAndSwath()
3021 p->myPipe[k].ProgressiveToInterlaceUnitInOPP, in CalculateVMRowAndSwath()
4818 bool ProgressiveToInterlaceUnitInOPP, in CalculateVUpdateAndDynamicMetadataParameters() argument
4843 if (InterlaceEnable == 1 && ProgressiveToInterlaceUnitInOPP == false) { in CalculateVUpdateAndDynamicMetadataParameters()
5185 p->myPipe->ProgressiveToInterlaceUnitInOPP, in CalculatePrefetchSchedule()
5265 …utFormat == dml2_420 || (p->myPipe->InterlaceEnable && p->myPipe->ProgressiveToInterlaceUnitInOPP)) in CalculatePrefetchSchedule()
7461 myPipe->ProgressiveToInterlaceUnitInOPP = mode_lib->ip.ptoi_supported; in dml_core_ms_prefetch_check()
8939 s->SurfParameters[k].ProgressiveToInterlaceUnitInOPP = mode_lib->ip.ptoi_supported; in dml_core_mode_support()
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