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Searched refs:PLL_SEC_DIV_MASK (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/clk/
H A Dclk-rp1.c234 #define PLL_SEC_DIV_MASK GENMASK(12, 8) macro
747 sec &= ~PLL_SEC_DIV_MASK; in rp1_pll_divider_set_rate()
748 sec |= FIELD_PREP(PLL_SEC_DIV_MASK, div); in rp1_pll_divider_set_rate()
1248 desc->div.shift = __ffs(PLL_SEC_DIV_MASK); in rp1_register_pll_divider()
1249 desc->div.width = __ffs(~(PLL_SEC_DIV_MASK >> desc->div.shift)); in rp1_register_pll_divider()