Searched refs:PLL_PCG_CLK_SEL_MASK (Results 1 – 1 of 1) sorted by relevance
| /linux/drivers/phy/rockchip/ |
| H A D | phy-rockchip-samsung-hdptx.c | 158 #define PLL_PCG_CLK_SEL_MASK GENMASK(3, 1) macro
1180 regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_SEL_MASK, in rk_hdptx_frl_lcpll_cmn_config()
1181 FIELD_PREP(PLL_PCG_CLK_SEL_MASK, (hdptx->hdmi_cfg.bpc - 8) >> 1)); in rk_hdptx_frl_lcpll_cmn_config()
1265 regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_SEL_MASK, in rk_hdptx_tmds_ropll_cmn_config()
1266 FIELD_PREP(PLL_PCG_CLK_SEL_MASK, (hdptx->hdmi_cfg.bpc - 8) >> 1)); in rk_hdptx_tmds_ropll_cmn_config()
2287 bpc = (FIELD_GET(PLL_PCG_CLK_SEL_MASK, val) << 1) + 8; in rk_hdptx_phy_clk_calc_rate_from_pll_cfg()
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