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Searched refs:PIPES_PER_PLANE (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_plane.h34 struct dpu_sw_pipe pipe[PIPES_PER_PLANE];
35 struct dpu_sw_pipe_cfg pipe_cfg[PIPES_PER_PLANE];
H A Ddpu_plane.c639 for (i = 0; i < PIPES_PER_PLANE; i++) { in _dpu_plane_color_fill()
1177 for (i = 0; i < PIPES_PER_PLANE; i++) in dpu_plane_virtual_atomic_check()
1264 for (i = 0; i < PIPES_PER_PLANE; i++) in dpu_plane_virtual_assign_resources()
1377 for (i = 0; i < PIPES_PER_PLANE; i++) in dpu_plane_flush()
1499 for (i = 0; i < PIPES_PER_PLANE; i++) { in dpu_plane_sspp_atomic_update()
1513 for (i = 0; i < PIPES_PER_PLANE; i++) { in dpu_plane_sspp_atomic_update()
1532 for (i = 0; i < PIPES_PER_PLANE; i += 1) { in _dpu_plane_atomic_disable()
1651 for (i = 0; i < PIPES_PER_PLANE; i++) { in dpu_plane_atomic_print_state()
1708 for (i = 0; i < PIPES_PER_PLANE; i++) { in dpu_plane_danger_signal_ctrl()
H A Ddpu_hw_mdss.h39 #define PIPES_PER_PLANE (PIPES_PER_STAGE * STAGES_PER_PLANE) macro
H A Ddpu_crtc.c1320 #define MAX_CHANNELS_PER_CRTC PIPES_PER_PLANE
1693 for (i = 0; i < PIPES_PER_PLANE; i++) { in _dpu_debugfs_status_show()