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Searched refs:PCIE_LC_TRAINING_CNTL__LC_POWER_STATE__SHIFT (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/pcie/
H A Dpcie_6_1_0_sh_mask.h635 #define PCIE_LC_TRAINING_CNTL__LC_POWER_STATE__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7337 #define PCIE_LC_TRAINING_CNTL__LC_POWER_STATE__SHIFT 0x00000008 macro
H A Dbif_4_1_sh_mask.h3216 #define PCIE_LC_TRAINING_CNTL__LC_POWER_STATE__SHIFT 0x8 macro
H A Dbif_5_0_sh_mask.h10960 #define PCIE_LC_TRAINING_CNTL__LC_POWER_STATE__SHIFT 0x8 macro
H A Dbif_5_1_sh_mask.h4170 #define PCIE_LC_TRAINING_CNTL__LC_POWER_STATE__SHIFT 0x8 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h42606 #define PCIE_LC_TRAINING_CNTL__LC_POWER_STATE__SHIFT … macro
H A Dnbio_4_3_0_sh_mask.h31502 #define PCIE_LC_TRAINING_CNTL__LC_POWER_STATE__SHIFT … macro
H A Dnbio_2_3_sh_mask.h53749 #define PCIE_LC_TRAINING_CNTL__LC_POWER_STATE__SHIFT … macro
H A Dnbio_6_1_sh_mask.h37966 #define PCIE_LC_TRAINING_CNTL__LC_POWER_STATE__SHIFT … macro