Searched refs:PCID (Results 1 – 6 of 6) sorted by relevance
| /linux/arch/mips/pci/ |
| H A D | fixup-malta.c | 10 #define PCID 4 macro
28 {0, 0, 0, 0, PCID }, /* 10: PIIX4 USB */
36 {0, PCIA, PCIB, PCIC, PCID }, /* 18: PCI Slot 1 */
37 {0, PCIB, PCIC, PCID, PCIA }, /* 19: PCI Slot 2 */
38 {0, PCIC, PCID, PCIA, PCIB }, /* 20: PCI Slot 3 */
39 {0, PCID, PCIA, PCIB, PCIC } /* 21: PCI Slot 4 */
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| H A D | fixup-lemote2f.c | 26 #define PCID 7 macro
40 {0, PCID, 0, 0, 0}, /* 20: 3-ports nec usb */
41 {0, PCIA, PCIB, PCIC, PCID}, /* 21: PCI-SLOT */
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| /linux/Documentation/arch/x86/ |
| H A D | pti.rst | 93 d. Process Context IDentifiers (PCID) is a CPU feature that
98 PCID support, the context switch code must flush both the user
99 and kernel entries out of the TLB. The user PCID TLB flush is
101 See intel.com/sdm for the gory PCID/INVPCID details.
114 g. On systems without PCID support, each CR3 write flushes
120 can only be flushed from the TLB for the current PCID. When
123 write upon the next use of every PCID.
190 the wrong PCID, or otherwise missing an invalidation.
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| /linux/arch/x86/kvm/ |
| H A D | cpuid.c | 867 F(PCID), in kvm_initialize_cpu_caps()
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| /linux/arch/x86/kvm/vmx/ |
| H A D | vmx.c | 7984 cr4_fixed1_update(X86_CR4_PCIDE, ecx, feature_bit(PCID)); in nested_vmx_cr_fixed1_bits_update()
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| /linux/Documentation/admin-guide/ |
| H A D | kernel-parameters.txt | 4618 nopcid [X86-64,EARLY] Disable the PCID cpu feature.
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