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Searched refs:Op1 (Results 1 – 7 of 7) sorted by relevance

/linux/arch/arm64/kvm/
H A Dsys_regs.h17 sys_reg((u32)(x)->Op0, (u32)(x)->Op1, \
22 u8 Op1; member
32 .Op1 = sys_reg_Op1(reg), \
39 .Op1 = ((esr) >> 14) & 0x7, \
46 ((struct sys_reg_params){ .Op1 = ((esr) >> 14) & 0x7, \
64 u8 Op1; member
111 p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); in print_sys_reg_msg()
189 if (i1->Op1 != i2->Op1) in cmp_sys_reg()
190 return i1->Op1 - i2->Op1; in cmp_sys_reg()
232 #define Op1(_x) .Op1 = _x macro
[all …]
H A Dtrace_handle_exit.h169 __field(u8, Op1)
181 __entry->Op1 = reg->Op1;
189 __entry->Op0, __entry->Op1, __entry->CRn,
H A Demulate-nested.c2053 encoding = sys_reg(sr->Op0, sr->Op1, sr->CRn, sr->CRm, sr->Op2); in populate_sysreg_config()
/linux/arch/arm/include/asm/vdso/
H A Dcp15.h14 #define __ACCESS_CP15(CRn, Op1, CRm, Op2) \ argument
15 "mrc", "mcr", __stringify(p15, Op1, %0, CRn, CRm, Op2), u32
16 #define __ACCESS_CP15_64(Op1, CRm) \ argument
17 "mrrc", "mcrr", __stringify(p15, Op1, %Q0, %R0, CRm), u64
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dsys_regs.c327 Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
/linux/Documentation/arch/arm64/
H A Dcpu-feature-registers.rst95 Op0=3, Op1=0, CRn=0, CRm=0,2,3,4,5,6,7
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic-v3.rst197 | Op 0 | Op1 | CRn | CRm | Op2 |