| /linux/drivers/gpu/drm/nouveau/dispnv50/ |
| H A D | base907c.c | 166 NVDEF(NV907C, SET_CSC_RED2RED, OWNER, CORE)); in base907c_csc_clr()
180 NVDEF(NV907C, SET_CSC_RED2RED, OWNER, BASE) | in base907c_csc_set()
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| H A D | corec37d.c | 45 NVDEF(NVC37D, WINDOW_SET_CONTROL, OWNER, HEAD(i >> 1))); in corec37d_wndw_owner()
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| H A D | disp.c | 476 const u32 ctrl = NVDEF(NV507D, DAC_SET_CONTROL, OWNER, NONE); in nv50_dac_atomic_disable()
493 case 0: ctrl |= NVDEF(NV507D, DAC_SET_CONTROL, OWNER, HEAD0); break; in nv50_dac_atomic_enable()
494 case 1: ctrl |= NVDEF(NV507D, DAC_SET_CONTROL, OWNER, HEAD1); break; in nv50_dac_atomic_enable()
1540 if (NVDEF_TEST(nv_encoder->ctrl, NV507D, SOR_SET_CONTROL, OWNER, ==, NONE)) in nv50_sor_update()
1966 const u32 ctrl = NVDEF(NV507D, PIOR_SET_CONTROL, OWNER, NONE); in nv50_pior_atomic_disable()
1983 case 0: ctrl |= NVDEF(NV507D, PIOR_SET_CONTROL, OWNER, HEAD0); break; in nv50_pior_atomic_enable()
1984 case 1: ctrl |= NVDEF(NV507D, PIOR_SET_CONTROL, OWNER, HEAD1); break; in nv50_pior_atomic_enable()
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| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm94708.dts | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm94709.dts | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm9hmidc.dtsi | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm911360k.dts | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm958305k.dts | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm23550-sparrow.dts | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm958300k.dts | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm953012er.dts | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm911360_entphn.dts | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm-cygnus-clock.dtsi | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm-hr2.dtsi | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm-cygnus.dtsi | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm-nsp.dtsi | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| /linux/arch/arm64/boot/dts/broadcom/stingray/ |
| H A D | bcm958742t.dts | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm958742k.dts | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | bcm958742-base.dtsi | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | stingray-fs4.dtsi | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | stingray-clock.dtsi | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| H A D | stingray-pinctrl.dtsi | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| /linux/arch/arm64/boot/dts/broadcom/northstar2/ |
| H A D | ns2-clock.dtsi | 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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| /linux/drivers/gpu/drm/tegra/ |
| H A D | dc.h | 749 #define OWNER(x) (((x) & 0xf) << 0) macro
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| /linux/arch/powerpc/crypto/ |
| H A D | curve25519-ppc64le_asm.S | 40 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|