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Searched refs:OWNER (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dbase907c.c166 NVDEF(NV907C, SET_CSC_RED2RED, OWNER, CORE)); in base907c_csc_clr()
180 NVDEF(NV907C, SET_CSC_RED2RED, OWNER, BASE) | in base907c_csc_set()
H A Dcorec37d.c45 NVDEF(NVC37D, WINDOW_SET_CONTROL, OWNER, HEAD(i >> 1))); in corec37d_wndw_owner()
H A Ddisp.c476 const u32 ctrl = NVDEF(NV507D, DAC_SET_CONTROL, OWNER, NONE); in nv50_dac_atomic_disable()
493 case 0: ctrl |= NVDEF(NV507D, DAC_SET_CONTROL, OWNER, HEAD0); break; in nv50_dac_atomic_enable()
494 case 1: ctrl |= NVDEF(NV507D, DAC_SET_CONTROL, OWNER, HEAD1); break; in nv50_dac_atomic_enable()
1540 if (NVDEF_TEST(nv_encoder->ctrl, NV507D, SOR_SET_CONTROL, OWNER, ==, NONE)) in nv50_sor_update()
1966 const u32 ctrl = NVDEF(NV507D, PIOR_SET_CONTROL, OWNER, NONE); in nv50_pior_atomic_disable()
1983 case 0: ctrl |= NVDEF(NV507D, PIOR_SET_CONTROL, OWNER, HEAD0); break; in nv50_pior_atomic_enable()
1984 case 1: ctrl |= NVDEF(NV507D, PIOR_SET_CONTROL, OWNER, HEAD1); break; in nv50_pior_atomic_enable()
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm94708.dts24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm94709.dts24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm9hmidc.dtsi24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm911360k.dts24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm958305k.dts24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm23550-sparrow.dts24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm958300k.dts24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm953012er.dts24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm911360_entphn.dts24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm-cygnus-clock.dtsi24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm-hr2.dtsi24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm-cygnus.dtsi24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm-nsp.dtsi24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dbcm958742t.dts24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm958742k.dts24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dbcm958742-base.dtsi24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dstingray-fs4.dtsi24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dstingray-clock.dtsi24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
H A Dstingray-pinctrl.dtsi24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
/linux/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2-clock.dtsi24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
/linux/drivers/gpu/drm/tegra/
H A Ddc.h749 #define OWNER(x) (((x) & 0xf) << 0) macro
/linux/arch/powerpc/crypto/
H A Dcurve25519-ppc64le_asm.S40 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,

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