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Searched refs:NumFclkLevelsEnabled (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_smu.h122 uint8_t NumFclkLevelsEnabled; member
150 uint8_t NumFclkLevelsEnabled; member
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_0_ppt.c682 if (dpm_level >= clk_table->NumFclkLevelsEnabled) in smu_v14_0_1_get_dpm_freq_by_index()
726 if (dpm_level >= clk_table->NumFclkLevelsEnabled) in smu_v14_0_0_get_dpm_freq_by_index()
840 max_dpm_level = clk_table->NumFclkLevelsEnabled - 1; in smu_v14_0_1_get_dpm_ultimate_freq()
960 max_dpm_level = clk_table->NumFclkLevelsEnabled - 1; in smu_v14_0_0_get_dpm_ultimate_freq()
1091 *count = clk_table->NumFclkLevelsEnabled; in smu_v14_0_1_get_dpm_level_count()
1120 *count = clk_table->NumFclkLevelsEnabled; in smu_v14_0_0_get_dpm_level_count()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/
H A Ddcn42_clk_mgr.c922 dpm_clks->NumFclkLevelsEnabled, in dcn42_get_smu_clocks()
988 …gr_base->bw_params->clk_table.num_entries_per_clk.num_fclk_levels = dpm_clks->NumFclkLevelsEnabled; in dcn42_get_smu_clocks()
989 clk_mgr_base->bw_params->clk_table.num_entries = dpm_clks->NumFclkLevelsEnabled; in dcn42_get_smu_clocks()