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Searched refs:NDTR1 (Results 1 – 7 of 7) sorted by relevance

/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g6-pinctrl.dtsi476 function = "NDTR1";
477 groups = "NDTR1";
H A Daspeed-g4.dtsi1019 function = "NDTR1";
1020 groups = "NDTR1";
H A Daspeed-g5.dtsi1172 function = "NDTR1";
1173 groups = "NDTR1";
/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g4.c746 SIG_EXPR_LIST_DECL_SINGLE(U4, NDTR1, NDTR1, U4_DESC);
747 PIN_DECL_2(U4, GPIOL4, VPIVS, NDTR1);
748 FUNC_GROUP_DECL(NDTR1, U4);
2196 ASPEED_PINCTRL_GROUP(NDTR1),
2351 ASPEED_PINCTRL_FUNC(NDTR1),
H A Dpinctrl-aspeed-g5.c724 SIG_EXPR_LIST_DECL_SINGLE(P4, NDTR1, NDTR1, P4_DESC, COND2);
725 PIN_DECL_2(P4, GPIOL4, VPIVS, NDTR1);
726 FUNC_GROUP_DECL(NDTR1, P4);
2210 ASPEED_PINCTRL_GROUP(NDTR1),
2380 ASPEED_PINCTRL_FUNC(NDTR1),
H A Dpinctrl-aspeed-g6.c722 SSSF_PIN_DECL(B12, GPIOM4, NDTR1, SIG_DESC_SET(SCU41C, 4));
1998 ASPEED_PINCTRL_GROUP(NDTR1),
2238 ASPEED_PINCTRL_FUNC(NDTR1),
/linux/drivers/mtd/nand/raw/
H A Dmarvell_nand.c158 #define NDTR1 0x0C macro
785 writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1); in marvell_nfc_select_target()
2730 marvell_nand->ndtr1 = readl_relaxed(nfc->regs + NDTR1); in marvell_nand_chip_init()