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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_self_test.c6 #define NA 0xCD macro
119 NA, 1, 0, pand_neq,
120 NA, IDLE_CHK_ERROR,
122 {NA, NA, 0x0FF010, 0, NA, NA} },
125 NA, 1, 0, pand_neq,
126 NA, IDLE_CHK_WARNING,
128 {NA, NA, 0x100000, 0, NA, NA} },
131 NA, 1, 0, pand_neq_x2,
132 NA, IDLE_CHK_WARNING,
134 {NA, NA, 0x31C1, 0x2000, 0x31C1, 0} },
[all …]
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-ipq4019.c520 PINGROUP(0, jtag, smart0, i2s_rx, NA, NA, NA, NA, NA, NA, NA, NA, NA,
521 NA, N
[all...]
H A Dpinctrl-apq8064.c504 PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
505 PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
506 PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
507 PINGROUP(3, NA, gp_clk_0a, NA, NA, NA, NA, NA, NA, NA, NA),
508 PINGROUP(4, NA, NA, cam_mclk, gp_clk_1a, NA, NA, NA, NA, NA, NA),
509 PINGROUP(5, NA, cam_mclk, NA, NA, NA, NA, NA, NA, NA, NA),
510 PINGROUP(6, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
511 PINGROUP(7, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
512 PINGROUP(8, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
513 PINGROUP(9, gsbi3, NA, NA, NA, NA, NA, NA, NA, NA, NA),
[all …]
H A Dpinctrl-ipq8064.c532 PINGROUP(0, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
533 PINGROUP(1, mdio, NA, NA, NA, NA, NA, NA, NA, NA, NA),
534 PINGROUP(2, gsbi5_spi_cs3, rgmii2, mdio, NA, NA, NA, NA, NA, NA, NA),
535 PINGROUP(3, pcie1_rst, pcie1_prsnt, pdm, NA, NA, NA, NA, NA, NA, NA),
536 PINGROUP(4, pcie1_pwren_n, pcie1_pwren, NA, NA, NA, NA, NA, NA, NA, NA),
537 PINGROUP(5, pcie1_clk_req, pcie1_pwrflt, NA, NA, NA, NA, NA, NA, NA, NA),
538 PINGROUP(6, gsbi7, usb_fs, gsbi5_spi_cs1, usb_fs_n, NA, NA, NA, NA, NA, NA),
539 PINGROUP(7, gsbi7, usb_fs, gsbi5_spi_cs2, NA, NA, NA, NA, NA, NA, NA),
540 PINGROUP(8, gsbi7, usb_fs, NA, NA, NA, NA, NA, NA, NA, NA),
541 PINGROUP(9, gsbi7, NA, NA, NA, NA, NA, NA, NA, NA, NA),
[all …]
H A Dpinctrl-apq8084.c1024 PINGROUP(0, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
1025 PINGROUP(1, blsp_spi1, blsp_uart1, blsp_uim1, NA, NA, NA, NA),
1026 PINGROUP(2, blsp_spi1, blsp_uart1, blsp_i2c1, NA, NA, N
[all...]
/linux/arch/arm/mach-omap1/
H A Dmux.c30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
40 MUX_CFG("UART3_TX", 6, 0, 1, 0, 30, 0, NA, 0, 0)
41 MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0)
42 MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0)
43 MUX_CFG("UART3_RTS", 5, 15, 2, 0, 25, 0, NA, 0, 0)
[all …]
H A Dmux.h101 PU_PD_REG(NA, 0) \
/linux/drivers/regulator/
H A Dpcap-regulator.c97 #define NA 0xff macro
120 VREG_INFO(V10, PCAP_REG_VREG2, 10, NA, 18, 24),
127 VREG_INFO(VSIM, PCAP_REG_AUXVREG, 17, 18, NA, 6),
128 VREG_INFO(VSIM2, PCAP_REG_AUXVREG, 16, NA, NA, 7),
129 VREG_INFO(VVIB, PCAP_REG_AUXVREG, 19, 20, NA, NA),
131 VREG_INFO(SW1, PCAP_REG_SWCTRL, 1, 2, NA, NA),
132 VREG_INFO(SW2, PCAP_REG_SWCTRL, 6, 7, NA, NA),
134 VREG_INFO(SW3, PCAP_REG_SWCTRL, 11, 12, 24, NA),
175 if (vreg->en == NA) in pcap_regulator_enable()
186 if (vreg->en == NA) in pcap_regulator_disable()
[all …]
/linux/Documentation/i2c/
H A Di2c-protocol.rst15 A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit
38 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
50 S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
61 Normally message is interrupted immediately if there is [NA] from the
62 client. Setting this flag treats any [NA] as [A], and all of
67 In a read message, master A/NA bit is skipped.
74 S Addr Rd [A] [Data] NA Data [A] P
H A Dsmbus-protocol.rst43 A, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit
77 S Addr Rd [A] [Data] NA P
105 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data] NA P
119 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [DataLow] A [DataHigh] NA P
169 Sr Addr Rd [A] [DataLow] A [DataHigh] NA P
186 Sr Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
305 Sr Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
/linux/Documentation/translations/it_IT/i2c/
H A Di2c-protocol.rst15 A, NA (1 bit) Bit di riconoscimento (ACK) e di non riconoscimento (NACK).
38 S Addr Rd [A] [Dati] A [Dati] A ... A [Dati] NA P
50 S Addr Rd [A] [Dati] NA S Addr Wr [A] Dati [A] P
62 risponde con [NA]. Impostando questo flag, si considera qualsiasi [NA] come
68 In un messaggio di lettura, il bit A/NA del master viene saltato.
76 S Addr Rd [A] [Dati] NA Dati [A] P
/linux/drivers/pinctrl/realtek/
H A Dpinctrl-rtd1619b.c1443 [RTD1619B_ISO_SPI_SI] = RTK_PIN_CONFIG(spi_si, 0x28, 15, 0, 1, 3, 2, 12, NA),
1444 [RTD1619B_ISO_SPI_SCK] = RTK_PIN_CONFIG(spi_sck, 0x2c, 0, 0, 1, 3, 2, 12, NA),
1445 [RTD1619B_ISO_SPI_CE_N] = RTK_PIN_CONFIG(spi_ce_n, 0x2c, 13, 0, 1, 3, 2, 12, NA),
1446 [RTD1619B_ISO_SPI_SO] = RTK_PIN_CONFIG(spi_so, 0x2c, 26, 0, 1, 3, 2, 12, NA),
1447 [RTD1619B_ISO_EMMC_CLK] = RTK_PIN_CONFIG(emmc_clk, 0x30, 7, 0, 1, 3, 2, 12, NA),
1448 [RTD1619B_ISO_EMMC_CMD] = RTK_PIN_CONFIG(emmc_cmd, 0x34, 0, 0, 1, 3, 2, 13, NA),
1449 [RTD1619B_ISO_EMMC_RST_N] = RTK_PIN_CONFIG(emmc_rst_n, 0x34, 14, 0, 1, 3, 2, 12, NA),
1450 [RTD1619B_ISO_EMMC_DD_SB] = RTK_PIN_CONFIG(emmc_dd_sb, 0x34, 27, 0, 1, 3, 2, 12, NA),
1451 [RTD1619B_ISO_EMMC_DATA_5] = RTK_PIN_CONFIG(emmc_data_5, 0x38, 8, 0, 1, 3, 2, 12, NA),
1452 [RTD1619B_ISO_EMMC_DATA_3] = RTK_PIN_CONFIG(emmc_data_3, 0x3c, 0, 0, 1, 3, 2, 12, NA),
[all …]
H A Dpinctrl-rtd.c306 if (config_desc->smt_offset == NA) { in rtd_pconf_parse_conf()
319 if (config_desc->pud_en_offset == NA) { in rtd_pconf_parse_conf()
331 if (config_desc->pud_en_offset == NA) { in rtd_pconf_parse_conf()
343 if (config_desc->pud_en_offset == NA) { in rtd_pconf_parse_conf()
356 if (config_desc->pud_en_offset == NA) { in rtd_pconf_parse_conf()
390 case NA: in rtd_pconf_parse_conf()
400 if (config_desc->power_offset == NA) { in rtd_pconf_parse_conf()
416 if (config_desc->slew_rate_offset == NA) { in rtd_pconf_parse_conf()
445 if (config_desc->input_volt_offset == NA) { in rtd_pconf_parse_conf()
466 if (config_desc->hvil_offset == NA) { in rtd_pconf_parse_conf()
[all...]
H A Dpinctrl-rtd.h6 #define NA 0xffffffff macro
/linux/tools/perf/util/
H A Devent.h99 (PERF_MEM_S(OP, NA) |\
100 PERF_MEM_S(LVL, NA) |\
101 PERF_MEM_S(SNOOP, NA) |\
102 PERF_MEM_S(LOCK, NA) |\
103 PERF_MEM_S(TLB, NA) |\
104 PERF_MEM_S(LVLNUM, NA))
H A Dintel-pt.c2288 P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA), /* L3 miss|SNP N/A */
2302 OP_LH | P(LVL, IO) | LEVEL(NA) | P(SNOOP, NONE), /* I/O hit|SNP None */
2303 OP_LH | P(LVL, UNC) | LEVEL(NA) | P(SNOOP, NONE), /* Uncached hit|SNP None */
2308 P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA), /* L3 miss|SNP N/A */
2322 OP_LH | P(LVL, IO) | LEVEL(NA) | P(SNOOP, NONE), /* I/O hit|SNP None */
2323 OP_LH | P(LVL, UNC) | LEVEL(NA) | P(SNOOP, NONE), /* Uncached hit|SNP None */
2358 val |= P(BLK, NA); in intel_pt_grt_latency_data()
2364 #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\
2365 PERF_MEM_S(LVL, NA) |\
2366 PERF_MEM_S(SNOOP, NA) |\
[all …]
H A Dmem-events.c751 if (lvl & P(LVL, NA)) in c2c_decode_stats()
/linux/drivers/ata/
H A Data_piix.c111 NA = -2, /* not available */ enumerator
344 { P0, NA, P1, NA }, /* 000b */
345 { P1, NA, P0, NA }, /* 001b */
377 { P0, P2, NA, NA }, /* 00b */
401 { P0, NA, P1, NA }, /* 00b */
413 { P0, NA, NA, NA }, /* 00b */
425 { P0, NA, P1, NA }, /* 00b */
1378 case NA: in piix_init_sata_map()
/linux/arch/x86/events/intel/
H A Dds.c126 P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA),/* 0x00:ukn L3 */
140 OP_LH | P(LVL, IO) | LEVEL(NA) | P(SNOOP, NONE), /* 0x0e: I/O */
141 OP_LH | P(LVL, UNC) | LEVEL(NA) | P(SNOOP, NONE), /* 0x0f: uncached */
234 P(OP, LOAD) | P(LVL, MISS) | LEVEL(L3) | P(SNOOP, NA), /* 0x00: ukn L3 */
271 P(OP, LOAD) | P(LVL, NA) | LEVEL(NA) | P(SNOOP, NA), /* 0x00: non-cache access */
286 OP_LH | P(LVL, UNC) | LEVEL(NA) | P(SNOOP, NONE), /* 0x0f: uncached */
294 P(OP, LOAD) | P(LVL, NA) | LEVEL(NA) | P(SNOOP, NA), /* 0x00: non-cache access */
300 OP_LH | P(LVL, UNC) | LEVEL(NA) | P(SNOOP, NONE), /* 0x06: uncached */
315 P(OP, LOAD) | P(LVL, NA) | LEVEL(NA) | P(SNOOP, NA), /* 0x00: invalid */
354 val |= P(SNOOP, NA); in parse_omr_data_source()
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-palmas.c469 PIN_INFO(nreswarm, NA, &pud_nreswarm_info, NULL);
470 PIN_INFO(pwrdown, NA, &pud_pwrdown_info, NULL);
471 PIN_INFO(gpadc_start, NA, &pud_gpadc_start_info, NULL);
472 PIN_INFO(reset_in, NA, &pud_reset_in_info, NULL);
473 PIN_INFO(nsleep, NA, &pud_nsleep_info, NULL);
474 PIN_INFO(enable1, NA, &pud_enable1_info, NULL);
475 PIN_INFO(enable2, NA, &pud_enable2_info, NULL);
/linux/include/linux/
H A Dperf_event.h1353 #define PERF_MEM_NA (PERF_MEM_S(OP, NA) |\
1354 PERF_MEM_S(LVL, NA) |\
1355 PERF_MEM_S(SNOOP, NA) |\
1356 PERF_MEM_S(LOCK, NA) |\
1357 PERF_MEM_S(TLB, NA) |\
1358 PERF_MEM_S(LVLNUM, NA))
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3660-hikey960.dts441 "NA",
445 "NA",
/linux/arch/x86/events/amd/
H A Dibs.c1150 /* Don't set HIT with NA */ in perf_ibs_is_mem_sample_type()
1151 return PERF_MEM_S(LVL, NA) | LN(NA);
/linux/drivers/tty/vt/
H A Ducs_fallback_table.h_shipped1090 { 0x28, 0x6E }, /* DEVANAGARI LETTER NA -> 'n' */
1144 { 0xA8, 0x6E }, /* BENGALI LETTER NA -> 'n' */
1182 { 0x28, 0x6E }, /* GURMUKHI LETTER NA -> 'n' */
1224 { 0xA8, 0x6E }, /* GUJARATI LETTER NA -> 'n' */
1267 { 0x28, 0x6E }, /* ORIYA LETTER NA -> 'n' */
1306 { 0xA8, 0x6E }, /* TAMIL LETTER NA -> 'n' */
1347 { 0x28, 0x6E }, /* TELUGU LETTER NA -> 'n' */
1389 { 0xA8, 0x6E }, /* KANNADA LETTER NA -> 'n' */
1432 { 0x28, 0x6E }, /* MALAYALAM LETTER NA -> 'n' */
1598 { 0x53, 0x6E }, /* TIBETAN LETTER NA -> 'n' */
[all …]
/linux/Documentation/networking/device_drivers/wifi/intel/
H A Dipw2200.rst379 | ZZB | Custom NA & Europe | 11 | 13 |

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