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Searched refs:MSR_IA32_L3_CBM_BASE (Results 1 – 3 of 3) sorted by relevance

/linux/arch/x86/kernel/cpu/resctrl/
H A Dcore.c71 .msr_base = MSR_IA32_L3_CBM_BASE,
164 if (wrmsrq_safe(MSR_IA32_L3_CBM_BASE, max_cbm)) in cache_alloc_hsw_probe()
167 rdmsrq(MSR_IA32_L3_CBM_BASE, l3_cbm_0); in cache_alloc_hsw_probe()
/linux/arch/x86/include/asm/
H A Dmsr-index.h1286 #define MSR_IA32_L3_CBM_BASE 0xc90 macro
/linux/tools/arch/x86/include/asm/
H A Dmsr-index.h1276 #define MSR_IA32_L3_CBM_BASE 0xc90 macro