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Searched refs:MP1_C2PMSG_0 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/accel/amdxdna/
H A Dnpu6_regs.c38 #define MP1_C2PMSG_0 0x3B10900 macro
90 DEFINE_BAR_OFFSET(SMU_CMD_REG, NPU6_SMU, MP1_C2PMSG_0),
H A Dnpu5_regs.c38 #define MP1_C2PMSG_0 0x3B10900 macro
90 DEFINE_BAR_OFFSET(SMU_CMD_REG, NPU5_SMU, MP1_C2PMSG_0),
H A Dnpu4_regs.c39 #define MP1_C2PMSG_0 0x3B10900 macro
126 DEFINE_BAR_OFFSET(SMU_CMD_REG, NPU4_SMU, MP1_C2PMSG_0),