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Searched refs:MI_LOAD_REGISTER_IMM (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/xe/
H A Dxe_gt.c282 *cs++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(count); in emit_wa_job()
313 *cs++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1); in emit_wa_job()
324 *cs++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(2) | in emit_wa_job()
351 *cs++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(3) | in emit_wa_job()
362 *cs++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1); in emit_wa_job()
H A Dxe_lrc.c202 *regs = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(count); in set_offsets()
663 regs[CTX_LRI_INT_REPORT_PTR] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(num_regs) | in set_memory_based_intr()
1205 *cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1); in setup_invalidate_state_cache_wa()
1897 case MI_LOAD_REGISTER_IMM: in dump_mi_command()
H A Dxe_ring_ops.c54 dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN; in emit_aux_table_inv()
H A Dxe_configfs.c735 MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1)); in parse_wa_bb_lines()
H A Dxe_oa.c680 bb->cs[bb->len++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(n_lri); in write_cs_mi_lri()
/linux/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_client_blt.c165 *cs++ = MI_LOAD_REGISTER_IMM(1); in prepare_blit()
205 *cs++ = MI_LOAD_REGISTER_IMM(1); in prepare_blit()
/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_workarounds.c580 *cs++ = MI_LOAD_REGISTER_IMM(1); in check_dirty_whitelist()
593 *cs++ = MI_LOAD_REGISTER_IMM(1); in check_dirty_whitelist()
904 *cs++ = MI_LOAD_REGISTER_IMM(whitelist_writable_count(engine)); in scrub_whitelisted_registers()
H A Dintel_gpu_commands.h155 #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*(x)-1) macro
H A Dselftest_execlists.c3083 *cs++ = MI_LOAD_REGISTER_IMM(1); in create_gpr_user()
4250 *cs++ = MI_LOAD_REGISTER_IMM(1); in preserved_virtual_engine()
H A Dintel_workarounds.c1023 *cs++ = MI_LOAD_REGISTER_IMM(wal->count); in intel_engine_emit_ctx_wa()
H A Dintel_execlists_submission.c2750 *cs++ = MI_LOAD_REGISTER_IMM(2 * GEN8_3LVL_PDPES) | MI_LRI_FORCE_POSTED; in emit_pdps()
/linux/drivers/gpu/drm/i915/
H A Di915_cmd_parser.c229 CMD( MI_LOAD_REGISTER_IMM(1), SMI, !F, 0xFF, W,
486 CMD( MI_LOAD_REGISTER_IMM(1), SMI, !F, 0xFF, W,
1292 if (cmd_desc_is(desc, MI_LOAD_REGISTER_IMM(1)) && in check_cmd()
H A Di915_perf.c2024 *cs++ = MI_LOAD_REGISTER_IMM(1); in alloc_noa_wait()
2042 *cs++ = MI_LOAD_REGISTER_IMM(1); in alloc_noa_wait()
2090 *cs++ = MI_LOAD_REGISTER_IMM(2); in alloc_noa_wait()
2171 *cs++ = MI_LOAD_REGISTER_IMM(n_lri); in write_cs_mi_lri()
2520 *cs++ = MI_LOAD_REGISTER_IMM(count); in gen8_load_flex()
/linux/drivers/gpu/drm/i915/selftests/
H A Di915_perf.c342 *cs++ = MI_LOAD_REGISTER_IMM(32); in live_noa_gpr()