Searched refs:MIPI_RX_ANA20_CSI0A (Results 1 – 2 of 2) sorted by relevance
45 mtk_phy_update_field(base + MIPI_RX_ANA20_CSI0A, RG_CSI0A_L2_T1BC_EQ_IS, 1); in mtk_phy_csi_cdphy_ana_eq_tune()46 mtk_phy_update_field(base + MIPI_RX_ANA20_CSI0A, RG_CSI0A_L2_T1BC_EQ_BW, 1); in mtk_phy_csi_cdphy_ana_eq_tune()52 mtk_phy_update_field(base + CSIXB_OFFSET + MIPI_RX_ANA20_CSI0A, RG_CSI0A_L2_T1BC_EQ_IS, 1); in mtk_phy_csi_cdphy_ana_eq_tune()53 mtk_phy_update_field(base + CSIXB_OFFSET + MIPI_RX_ANA20_CSI0A, RG_CSI0A_L2_T1BC_EQ_BW, 1); in mtk_phy_csi_cdphy_ana_eq_tune()
44 #define MIPI_RX_ANA20_CSI0A 0x0020 macro