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Searched refs:MIDSR_RBE (Results 1 – 2 of 2) sorted by relevance

/linux/sound/pci/cs46xx/
H A Dcs46xx.h746 #define MIDSR_RBE 0x00000002 /* Rx FIFO is empty. */ macro
H A Dcs46xx_lib.c1390 while ((snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_RBE) == 0) { in snd_cs46xx_interrupt()